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WM8741 bảng dữ liệu(PDF) 29 Page - Wolfson Microelectronics plc |
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WM8741 bảng dữ liệu(HTML) 29 Page - Wolfson Microelectronics plc |
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29 / 64 page ![]() Production Data WM8741 w PD, Rev 4.2, October 2009 29 LRCLK POLARITY In left justified, right justified or I2S modes, the LRP register bit controls the polarity of LRCLK. If this bit is set high, the expected polarity of LRCLK will be the opposite of that shown in Figure 14, Figure 15 and Figure 16. If this feature is used as a means of swapping the left and right channels, a 1 sample phase difference will be introduced. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R5 Format Control 05h 4 LRP 0 LRCLK polarity select: 0 = normal LRCLK polarity 1 = inverted LRCLK polarity Table 17 LRCLK Polarity Control In DSP modes, the LRP register bit is used to select between DSP mode A and B (see Figure 17 and Figure 18). REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R5 Format Control 05h 4 LRP 0 DSP format select: 0 = DSP mode A 1 = DSP mode B Table 18 DSP Format Control BCLK / DSDCLK64 POLARITY In PCM mode, LRCLK and DIN are sampled on the rising edge of BCLK by default, and should ideally change on the falling edge. Data sources which change LRCLK and DIN on the rising edge of BCLK can be supported by setting the BCP register bit. Setting BCP to 1 inverts the polarity of BCLK to the inverse of that shown in Figure 14, Figure 15, Figure 16, Figure 17 and Figure 18. In DSD mode, DSDL and DSDR inputs are sampled a fixed delay after a falling 64fs clock edge. When BCP is set in DSD mode, DSDL and DSDR are sampled a fixed delay after a rising 64fs clock edge. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R5 Format Control 05h 5 BCP 0 BCLK / DSD64CLK polarity select: 0 = normal polarity 1 = inverted polarity Table 19 BCLK Polarity Control OVERSAMPLING RATE CONTROL The user has control of the oversampling ratio of the WM8741, and can set to the device to operate in low, medium or high rate modes. For correct operation of the digital filtering and other processing on the WM8741, the user must ensure the correct value of OSR[1:0] is set at all times. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R7 Mode Control 1 07h [6:5] OSR[1:0] 00 Oversampling Rate Selection 00 = Low rate (32/44.1/48kHz) 01 = Medium rate (96kHz) 10 = High rate (192kHz) 11 = Unused Table 20 Oversampling Rate Control |
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