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CXP-82220 bảng dữ liệu(PDF) 13 Page - Sony Corporation |
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CXP-82220 bảng dữ liệu(HTML) 13 Page - Sony Corporation |
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13 / 21 page ![]() – 13 – CXP82220/82224 VDD = 4.5V, IOH = –0.5mA VDD = 4.5V, IOH = –1.2mA VDD = 4.5V, IOL = 1.8mA VDD = 4.5V, IOL = 3.6mA VDD = 4.5V, IOL = 12.0mA VDD = 5.5V, VIH = 5.5V VDD = 5.5V, VIL = 0.4V VDD = 5.5V, VIH = 5.5V High level output voltage 4.0 3.5 0.5 –0.5 0.1 –0.1 –1.5 –8 –20 60 V V V V V µA µA µA µA µA mA mA µA k Ω µA mA µA mA µA µA pF PC EXTAL TEX RST∗1 Item Symbol Pins Conditions Min. VDD IDD1 IOH ILOL IDD2 IDDS1 IDDS2 IDDS3 CIN VOH VOL IIHE IILE IIHT IILT IILR Low level output voltage Input current Typ. 0.4 0.6 1.5 40 –40 10 –10 –400 –20 270 ±10 40 100 8 30 10 20 Max. Unit DC Characteristics Electrical Characteristics (Ta = –20 to +75°C, Vss = 0V reference) VDD = 5.5V, 10MHz crystal oscillation (C1 = C2 = 15pF) VDD = 3V, 32kHz crystal oscillation (C1 = C2 = 47pF) VDD = 5.5V, 10MHz crystal oscillation (C1 = C2 = 15pF) VDD = 3V, 32kHz crystal oscillation (C1 = C2 = 47pF) Supply current∗3 Input capacity VDD = 5.5V, VIL = 0.4V VDD = 4.5V, VOH = VDD – 2.5V VDD = 5.5V VOL = VDD – 35V VFDP = VDD – 35V High-speed mode operation (1/2 frequency demultiplier clock) Stop mode VDD = 5.5V, termination of 10MHz and 32kHz crystal oscillation Clock 1MHz 0V for all pins excluding measured pins Display output current IIZ I/O leakage current Open drain output leakage current (P-CH Tr in off state) S0 to S23 S24/T15 to S31/T8 T0 to T7 S0 to S23 S24/T15 to S31/T8 T0 to T7 RL VDD = 5V VFDP = VDD – 35V VDD = 5.5V VI = 0, 5.5V Pull-down resistance∗2 S0 to S23 S24/T15 to S31/T8 T0 to T7 PA to PC, PE, PG, PH, RST∗1 100 20 35 1.2 9 10 PA, PB, PC,PE6, PE7, PG, PH Pins other than S0 to S31, T0 to T7, PB7, PE6,PE7,AVREF, AVSS, VFDP, VDD, VSS Sleep mode ∗1 RST specifies the input current when pull-up resistance has been selected; leakage current when no resisance has been selected. ∗2 When incorporated pull-down resistance has been selected through mask option. ∗3 When all pins are open. |
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