STLC3075_09 datasheet(14/36 Pages) STMICROELECTRONICS

14 / 36 page

Functional description

STLC3075

14/36

and ideal TTX echo cancellation), the metering pulse level on the line equals 1.33 or 2.66

times the level applied to the RTTX pin.

As already mentioned the metering pulse echo cancellation is obtained by means of two

external components (RTTX and CTTX) that should match the line impedance at the TTX

frequency. This simple network has a double effect:

●

it synthesizes a low output impedance at the TIP/RING pins at the TTX frequency

●

it cuts the eventual TTX echo that would have been transferred from the line to the TX

output

4.2.4

Ringing

When this mode is selected, the STLC3075 self generates a higher negative battery

(-70 V typ.) in order to allow a balanced ringing signal of typically 65 V peak.

In this condition both the DC and AC feedback loops are disabled and the SLIC line drivers

operate as voltage buffers. The ring waveform is obtained by toggling the D2 control bit at

the desired ring frequency. This bit in fact controls the line polarity (0=direct; 1= reverse). As

in the active mode the line voltage transition is performed with a ramp transition, obtaining in

this way a trapezoidal balanced ring waveform (see Figure 7). The shaping is defined by the

CREV external capacitor.

Figure 7.

TIP/RING typical ringing waveform

Selecting the proper capacitor value it is possible to get different crest factor values.

The following table shows the crest factor values obtained with a 20 Hz and 25 Hz ring

frequency and with 1REN. These value are valid either with European or USA specification:

The ring trip detection is performed by sensing the variation of the AC line impedance from

on-hook (relatively high) to off-hook (low). This particular ring trip method allows to operate

without DC offset superimposed on the ring signal and therefore obtaining the maximum

possible ring level on the load starting from a given negative battery.

It should be noted that such a method is optimized for operation on short loop applications

and may not operate properly in the case of long loop applications (> 500

Ω).

Table 9.

CREST factor values @ 20 and 25Hz

CREV

CREST factor @20Hz

CREST factor @25Hz

22 nF

1.2

1.26

27 nF

1.25

1.32

33 nF

1.33

Not significant(1)

Distortion already less than 10%

GND

TIP

RING

dV/dT set

by CREV

2.5V typ.

65V

typ.

VBAT

2.5V typ.

STLC3075 bảng dữ liệu(PDF) 14 Page - STMicroelectronics

STLC3075 bảng dữ liệu(HTML) 14 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

bảng dữ liệu tải về

Link URL