Analog front end (AFE)

ST7590

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Doc ID 18349 Rev 1

4.5

Zero-crossing detector

The ST7590 embeds an analog comparator with hysteresis, used for zero-crossing

detection. Information about zero crossing events is managed as specified in PRIME

protocol specifications.

4.6

One time programmable (OTP) memory array

ST7590 comes with an embedded 64 bit OTP array. This OTP memory is used to store

hardware trimming values and the unique identifier EUI48, used for unique addressing in

PRIME MAC protocol.

OTP array is composed of 4 16 bit words, indexed from 0 to 3, where the first (index 0)

contains hardware trimming values, while the others contain the EUI48 address as specified

in Table 7.

4.7

Power management

Figure 7 shows the power supply structure for the ST7590. The ST7590 operates from two

external supply voltages:

●

VCC (8 to 18 V) as the main power supply;

●

VDDIO (3.3 or 5 V) for the I/O and digital sections.

Two internal linear regulators provide the remaining required voltages:

●

5 V regulator (used by the analog front end blocks), generated from the VCC voltage

and connected to the VCCA pin;

●

1.8 V regulator (required for the DSP and microcontroller cores, the digital blocks, the

PLL and the oscillator), generated from the VDDIO voltage and connected to the

VDD_REG_1V8 pin.

All the supply voltages must be properly filtered, to their respective ground, using external

capacitors close to each supply pin (see Figure 7).

Note:

The internal regulators connected to VDD_REG_1V8 and VCCA are not designed to supply

external circuitry; their output is externally accessible for filtering purpose only.

Table 7.

OTP memory array

Index

LSB

MSB

0

Reserved – hardware trimming

1

EUI48[0..7]

EUI48[8..15]

2

EUI48[16..23]

EUI48[24..31]

3

EUI48[32..39]

EUI48[40..47]