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CXG1053FN bảng dữ liệu(PDF) 3 Page - Sony Corporation |
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CXG1053FN bảng dữ liệu(HTML) 3 Page - Sony Corporation |
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3 / 8 page ![]() – 3 – CXG1053FN 2. Power Amplifier Block + Antenna Switch Transmitter Block These specifications are when the Sony's recommended evaluation board with the external circuit shown on page 7 is used. Therefore, the power amplifier output pin (POUT) and the antenna switch transmission input pin (Tx) are connected via an external circuit. The specifications of the power amplifier block are set including the antenna switch transmitter block. Unless otherwise specified: VDD = 3V, VPCTL = 2V, VCTL1 = 3V, VCTL2 = 0V, IDD = 150mA, POUT = 20.2dBm, f = 1.9GHz, Ta = 25°C Current consumption Gate voltage adjustment value Output power Power gain Adjacent channel leak power ratio (600 ± 100KHz) Adjacent channel leak power ratio (900 ± 100KHz) Occupied bandwidth 2nd-order harmonic level 3rd-order harmonic level Item Symbol 0 20.2 36 Min. 150 0.25 39 –63 –70 250 Typ. 0.6 –55 –60 275 –25 –25 Max. mA V dBm dB dBc dBc KHz dBc dBc Unit Measured with the ANT pin Measured with the ANT pin Measured with the ANT pin Measured with the ANT pin Measured with the ANT pin Measured with the ANT pin Measurement conditions Electrical Characteristics 1. Control Pin Logic for Antenna Switch Conditions of control pin ANT – TX ANT – RX VCTL1 = 3V, VCTL2 = 0V VCTL1 = 0V, VCTL2 = 3V ON OFF OFF ON IDD VGG POUT GP ACPR600kHz ACPR900kHz OBW — — |
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