công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

Preview PDF HTML

TNETX3190PGV bảng dữ liệu(PDF) 61 Page - Texas Instruments

tên linh kiện TNETX3190PGV
Giải thích chi tiết về linh kiện  ThunderSWITCHE 16/3 ETHERNETE SWITCH WITH 16 10-MBIT/S PORTS AND 3 10-/100-MBIT/S PORTS
PDF  66 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  TI1 [Texas Instruments]
Trang chủ  http://www.ti.com
Logo TI1 - Texas Instruments

TNETX3190PGV bảng dữ liệu(HTML) 61 Page - Texas Instruments

Back Button TNETX3190PGV Datasheet HTML 57Page - Texas Instruments TNETX3190PGV Datasheet HTML 58Page - Texas Instruments TNETX3190PGV Datasheet HTML 59Page - Texas Instruments TNETX3190PGV Datasheet HTML 60Page - Texas Instruments TNETX3190PGV Datasheet HTML 61Page - Texas Instruments TNETX3190PGV Datasheet HTML 62Page - Texas Instruments TNETX3190PGV Datasheet HTML 63Page - Texas Instruments TNETX3190PGV Datasheet HTML 64Page - Texas Instruments TNETX3190PGV Datasheet HTML 65Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 61 / 66 page
background image
TNETX3190
ThunderSWITCH
™ 16/3 ETHERNET™ SWITCH
WITH 16 10-MBIT/S PORTS AND 3 10-/100-MBIT/S PORTS
SPWS046B – FEBRUARY 1998 – REVISED APRIL 1999
61
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
EEPROM interface
operating characteristics over recommended operating conditions (see Figure 21)
NO
PARAMETER
TNETX3150
TNETX3150A
UNIT
NO.
PARAMETER
MIN
MAX
MIN
MAX
UNIT
fclock (ECLK)
Clock frequency, ECLK
98
98
kHz
1
td (ECLKH–EDIOL)
Delay time, from ECLK
↑ to EDIO↓ (see Note 9)
5
5
µs
2
td (EDIOL–ECLKL)
Delay time, from EDIO
↓ to ECLK↓ (see Note 9)
5
5
µs
3
td (ECLKL–EDIOX)
Delay time, from ECLK
↓ to EDIO changing (see Note 10)
0
0
µs
4
td (EDIOV–ECLKH)
Delay time, from EDIO valid output to ECLK
↑
0
0
µs
5
td (ECLKL–EDIOV)
Delay time, from ECLK
↓ to EDIO valid
0
0
µs
6
td (ECLKL–EDIOX)
Delay time, from ECLK
↓ to EDIO changing (see Note 11)
0
0
µs
7
td (ECLKH–EDIOX)
Delay time, from ECLK
↑ to EDIO invalid
5
5
µs
8
td (EDIOV–ECLKH)
Delay time, from EDIO valid input to ECLK
↑
10
10
µs
NOTES:
9. This is a start condition delay time during ECLK high.
10. This is a changing-data condition delay time for output EDIO.
11. This is a changing-data condition delay time for input EDIO.
7
ECLK
(output)
EDIO
(output)
EDIO
(input)
1
6
4
8
Valid
Valid
Valid
Valid
5
23
Figure 21. EEPROM



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com