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TMP100MDBVREP bảng dữ liệu(PDF) 10 Page - Texas Instruments |
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TMP100MDBVREP bảng dữ liệu(HTML) 10 Page - Texas Instruments |
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10 / 22 page ![]() TMP100−EP, TMP101−EP DIGITAL TEMPERATURE SENSOR WITH I2C INTERFACE SGLS254A − JULY 2005 - REVISED APRIL 2010 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 APPLICATION INFORMATION serial interface The TMP100 and TMP101 operate only as slave devices on the I2C bus and SMBus. Connections to the bus are made via the open-drain I/O lines SDA and SCL. The TMP100 and TMP101 support the transmission protocol for fast (up to 400 kHz) and high-speed (up to 3.4 MHz) modes. All data bytes are transmitted most significant bit first. serial bus address To program the TMP100 and TMP101, the master must first address slave devices via a slave address byte. The slave address byte consists of seven address bits and a direction bit indicating the intent of executing a read or write operation. The TMP100 features two address pins to allow up to eight devices to be addressed on a single I2C interface. Table 11 describes the pin logic levels used to properly connect up to eight devices. Float indicates the pin is left unconnected. The state of pins ADD0 and ADD1 is sampled on the first I2C bus communication and should be set prior to any activity on the interface. ADD1 ADD0 SLAVE ADDRESS 0 0 1001000 0 Float 1001001 0 1 1001010 1 0 1001100 1 Float 1001101 1 1 1001110 Float 0 1001011 Float 1 1001111 Table 11. Address Pins and Slave Addresses for TMP100 The TMP101 features one address pin and an ALERT pin, allowing up to three devices to be connected per bus. Pin logic levels are described in Table 12. The address pins of the TMP100 and TMP101 are read after reset or in response to an I2C address acquire request. Following a read, the state of the address pins is latched to minimize power dissipation associated with detection. ADD0 SLAVE ADDRESS 0 1001000 Float 1001001 1 1001010 Table 12. Address Pins and Slave Addresses for TMP101 |
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