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EM357 bảng dữ liệu(PDF) 4 Page - Silicon Laboratories

tên linh kiện EM357
Giải thích chi tiết về linh kiện  High-Performance, Integrated ZigBee/802.15.4 System-on-Chip
PDF  244 Pages
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nhà sản xuất  SILABS [Silicon Laboratories]
Trang chủ  http://www.silabs.com
Logo SILABS - Silicon Laboratories

EM357 bảng dữ liệu(HTML) 4 Page - Silicon Laboratories

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EM351 / EM357
8.3.2
Set Up and Configuration
8-7
8.3.3
Operation
8-8
8.3.4
Interrupts
8-9
8.3.5
Registers
8-10
8.4 SPI - Slave Mode
8-14
8.4.1
GPIO Usage
8-14
8.4.2
Set Up and Configuration 8-15
8.4.3
Operation
8-16
8.4.4
DMA
8-17
8.4.5
Interrupts
8-17
8.4.6
Registers
8-18
8.5 TWI - Two Wire serial Interfaces 8-18
8.5.1
GPIO Usage
8-18
8.5.2
Set Up and Configuration 8-18
8.5.3
Constructing Frames
8-19
8.5.4
Interrupts
8-21
8.5.5
Registers
8-22
8.6 UART - Universal Asynchronous
Receiver / Transmitter
8-24
8.6.1
GPIO Usage
8-24
8.6.2
Set Up and Configuration 8-25
8.6.3
FIFOs
8-27
8.6.4
RTS/CTS Flow control
8-27
8.6.5
DMA
8-28
8.6.6
Interrupts
8-28
8.6.7
Registers
8-29
8.7 DMA Channels
8-32
8.7.1
Registers
8-34
9 General Purpose Timers (TIM1 and
TIM2)
9-1
9.1 Introduction
9-1
9.2 GPIO Usage
9-3
9.3 Timer Functional Description
9-3
9.3.1
Time-Base Unit
9-3
9.3.2
Counter Modes
9-4
9.3.3
Clock Selection
9-9
9.3.4
Capture/Compare
Channels
9-12
9.3.5
Input Capture Mode
9-13
9.3.6
PWM Input Mode
9-14
9.3.7
Forced Output Mode
9-15
9.3.8
Output Compare Mode
9-15
9.3.9
PWM Mode
9-16
9.3.10 One-Pulse Mode
9-19
9.3.11 Encoder Interface Mode
9-20
9.3.12 Timer Input XOR Function 9-22
9.3.13 Timers and External
Trigger Synchronization
9-22
9.3.14 Timer Synchronization
9-25
9.3.15 Timer Signal Descriptions 9-29
9.4 Interrupts
9-30
9.5 Registers
9-31
10 ADC (Analog to Digital Converter) 10-1
10.1 Setup and Configuration
10-1
10.1.1 GPIO Usage
10-2
10.1.2 Voltage Reference
10-2
10.1.3 Offset/Gain Correction
10-2
10.1.4 DMA
10-3
10.1.5 ADC Configuration
Register
10-3
10.2 Interrupts
10-5
10.3 Operation
10-6
10.4 Calibration
10-7
10.5 ADC Key Parameters
10-8
10.6 Registers
10-13
11 Interrupt System
11-1
11.1 Nested Vectored Interrupt
Controller (NVIC)
11-1
11.2 Event Manager
11-3
11.3 Non-maskable Interrupt (NMI)
11-6
11.4 Faults
11-6
11.5 Registers
11-7
12 Trace Port Interface Unit (TPIU) 12-1
13 Instrumentation Trace
Macrocell (ITM)
13-1
14 Data Watchpoint and
Trace (DWT)
14-1
15 Flash Patch and Breakpoint (FPB) 15-1
16 Integrated Voltage Regulator
16-1
17 Serial Wire and JTAG
(SWJ) Interface
17-1
18 Typical Application
18-1
19 Mechanical Details
19-1
19.1 QFN48 Footprint
Recommendations
19-1
19.2 Solder Temperature Profile
19-3
20 Part Marking
20-1
21 Ordering Information
21-1
22 Shipping Box Label
22-1
23 Revision History
23-1
Appendix A Register Address Table
A-1
Appendix B Abbreviations and
Acronyms
B-1
Appendix C References
C-1
Final
120-035X-000 Rev. 1.2



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