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MSP430F6433IPZ bảng dữ liệu(PDF) 21 Page - Texas Instruments |
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MSP430F6433IPZ bảng dữ liệu(HTML) 21 Page - Texas Instruments |
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21 / 106 page ![]() MSP430F643x www.ti.com SLAS720B – AUGUST 2010 – REVISED AUGUST 2012 System Module (SYS) The SYS module handles many of the system functions within the device. These include power-on reset and power-up clear handling, NMI source selection and management, reset interrupt vector generators, bootstrap loader entry mechanisms, and configuration management (device descriptors). SYS also includes a data exchange mechanism via JTAG called a JTAG mailbox that can be used in the application. Table 13. System Module Interrupt Vector Registers INTERRUPT VECTOR INTERRUPT EVENT WORD ADDRESS OFFSET PRIORITY REGISTER No interrupt pending 00h Brownout (BOR) 02h Highest RST/NMI (BOR) 04h DoBOR (BOR) 06h LPM3.5 or LPM4.5 wakeup (BOR) 08h Security violation (BOR) 0Ah SVSL (POR) 0Ch SVSH (POR) 0Eh SVML_OVP (POR) 10h SYSRSTIV, System Reset 019Eh SVMH_OVP (POR) 12h DoPOR (POR) 14h WDT timeout (PUC) 16h WDT key violation (PUC) 18h KEYV flash key violation (PUC) 1Ah Reserved 1Ch Peripheral area fetch (PUC) 1Eh PMM key violation (PUC) 20h Reserved 22h to 3Eh Lowest No interrupt pending 00h SVMLIFG 02h Highest SVMHIFG 04h DLYLIFG 06h DLYHIFG 08h SYSSNIV, System NMI VMAIFG 019Ch 0Ah JMBINIFG 0Ch JMBOUTIFG 0Eh SVMLVLRIFG 10h SVMHVLRIFG 12h Reserved 14h to 1Eh Lowest No interrupt pending 00h NMIFG 02h Highest SYSUNIV, User NMI OFIFG 019Ah 04h ACCVIFG 06h Reserved 08h to 1Eh Lowest Copyright © 2010–2012, Texas Instruments Incorporated 21 |
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