SL74HC573 datasheet(4/5 Pages) SLS

4 / 5 page

SL74HC573

System Logic

Semiconductor

SLS

AC ELECTRICAL CHARACTERISTICS(C

L=50pF,Input t r=tf=6.0 ns)

VCC

Guaranteed Limit

Symbol

Parameter

°C to

-55

°C

≤85°C

≤125°C

Unit

tPLH, tPHL

Maximum Propagation Delay, Input D to Q

(Figures 1 and 5)

2.0

4.5

6.0

150

190

225

tPLH, tPHL

Maximum Propagation Delay,Latch Enable

to Q (Figures 2 and 5)

2.0

4.5

6.0

160

200

240

tPLZ, tPHZ

Maximum Propagation Delay, Output Enable to Q

(Figures 3 and 6)

2.0

4.5

6.0

150

190

225

tPZH, tPZL

Maximum Propagation Delay, Output Enable to Q

(Figures 3 and 6)

2.0

4.5

6.0

150

190

225

tTLH, tTHL

Maximum Output Transition Time, Any Output

(Figures 1 and 5)

2.0

4.5

6.0

CIN

Maximum Input Capacitance

COUT

Maximum Three-State Output Capacitance

(Output in High-Impedance State)

Power Dissipation Capacitance (Per Enabled

Output)

Typical @25

°C,V

CC=5.0 V

CPD

Used to determine the no-load dynamic power

consumption: PD=CPDVCC

2f+I

CCVCC

TIMING REQUIREMENTS (C

L=50pF,Input t r=tf=6.0 ns)

VCC

Guaranteed Limit

Symbol

Parameter

°C to

-55

°C

≤85°C

≤125°C

Unit

tSU

Minimum Setup Time, Input D

to Latch Enable

(Figure 4)

2.0

4.5

6.0

Minimum Hold Time, Latch

Enable to Input D

(Figure 4)

2.0

4.5

6.0

Minimum Pulse Width, Latch

Enable (Figure 2)

2.0

4.5

6.0

110

tr, tf

Maximum Input Rise and Fall

Times (Figure 1)

2.0

4.5

6.0

1000

500

400

1000

500

400

1000

500

400

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