DAC715PLG4 datasheet(3/14 Pages) TI1

3 / 14 page

DAC715

ABSOLUTE MAXIMUM RATINGS(1)

+VCC to COMMON ...................................................................... 0V, +17V

–VCC to COMMON ...................................................................... 0V, –17V

+VCC to –VCC ........................................................................................................................... 34V

Digital Inputs to COMMON ..................................................... –1V to +VCC

External Voltage Applied to BPO and Range Resistors .....................

±V

VREF OUT ...................................................... Indefinite Short to COMMON

VOUT ............................................................ Indefinite Short to COMMON

Power Dissipation .......................................................................... 750mW

Storage Temperature ...................................................... –60

°C to +150°C

Lead Temperature (soldering, 10s) ................................................ +300

°C

NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings” may

cause permanent damage to the device. Exposure to absolute maximum

conditions for extended periods may affect device reliability.

PACKAGE DRAWING

PRODUCT

PACKAGE

NUMBER(1)

DAC715P

Plastic DIP

246

DAC715U

Plastic SOIC

217

DAC715PB

Plastic DIP

246

DAC715UB

Plastic SOIC

217

DAC715PK

Plastic DIP

246

DAC715UK

Plastic SOIC

217

DAC715PL

Plastic DIP

246

DAC715UL

Plastic SOIC

217

NOTE: (1) For detailed drawing and dimension table, please see end of data

sheet, or Appendix C of Burr-Brown IC Data Book.

TIMING DIAGRAM

TIMING SPECIFICATIONS

0, A1

D0-D15

CLR

DESCRIPTION

→ 0 → 1

Load Input Latch

→ 0 → 1

Load D/A Latch

→ 0 → 1

No Change

Latches Transparent

No Change

Reset D/A Latch

TRUTH TABLE

PACKAGE INFORMATION

ELECTROSTATIC

DISCHARGE SENSITIVITY

Electrostatic discharge can cause damage ranging from per-

formance degradation to complete device failure. Burr-Brown

Corporation recommends that all integrated circuits be handled

and stored using appropriate ESD protection methods.

ESD damage can range from subtle performance degradation

to complete device failure. Precision integrated circuits may

be more susceptible to damage because very small parametric

changes could cause the device not to meet published speci-

fications.

ORDERING INFORMATION

DIFFERENTIAL

LINEARITY

TEMPERATURE

ERROR MAX

PRODUCT

PACKAGE

RANGE

at +25

°C

DAC715P

Plastic DIP

–40

°C to +85°C

±4LSB

DAC715U

Plastic SOIC

–40

°C to +85°C

±4LSB

DAC715PB

Plastic DIP

–40

°C to +85°C

±2LSB

DAC715UB

Plastic SOIC

–40

°C to +85°C

±2LSB

DAC715PK

Plastic DIP

°C to 70°C

±2LSB

DAC715UK

Plastic SOIC

°C to 70°C

±2LSB

DAC715PL

Plastic DIP

°C to 70°C

±1LSB

DAC715UL

Plastic SOIC

°C to 70°C

±1LSB

TA = –40°C to +85°C, +VCC = +12V or +15V, –VCC = –12V or –15V.

SYMBOL

PARAMETER

MIN

MAX

UNITS

tDW

Data Valid to End of WR

tAW

A0, A1 Valid to End of WR

tAH

A0, A1 Hold after End of WR

tDH

Data Hold after end of WR

tWP(1)

Write Pulse Width

tCP

CLEAR Pulse Width

200

NOTES: (1) For single-buffered operation, tWP is 80ns min. Refer to page 10.

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes

no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change

without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant

any BURR-BROWN product for use in life support devices and/or systems.

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