10

®

DAC715

The digital interface of the DAC715 can be made transpar-

ent by asserting A

HIGH.

To operate the DAC715 interface as a single-buffered latch,

the DATA INPUT LATCH is permanently enabled by

D/A, it should be connected to DCOM also. For this mode

of operation, the width of WR will need to be at least 80ns

minimum to pass data through the DATA INPUT LATCH

and into the D/A LATCH.

TRANSPARENT INTERFACE

FIGURE 6. Manual Offset and Gain Adjust Circuits.

5k

Ω

3

4

6

+10V V

OUT

10k

Ω

IDAC

0-2mA

≈ +2.5V

15k

Ω

R

3

27k

Ω

R

1

100

Ω

P

2

10k

Ω – 100kΩ

P

1

1k

Ω

5

170

Ω

Internal

+10V Reference

V

REF OUT

–V

CC

+V

CC

Gain Adjust

Offset Adjust

2

ACOM

R

2

2M

Ω

For no external adjustments, pins 4 and 6 are not connected.

External resistors R1 - R4 are standard ±1% values. Range of

adjustment at least ±0.03% FSR.