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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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SC667201MMG3 bảng dữ liệu(PDF) 50 Page - Freescale Semiconductor, Inc |
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SC667201MMG3 bảng dữ liệu(HTML) 50 Page - Freescale Semiconductor, Inc |
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50 / 120 page  MPC5642A Microcontroller Data Sheet, Rev. 3.1 50 Freescale Semiconductor Pinout and signal description DSPI_C_SCK_LVDS DSPI_C_SCK_LVDS+ DSPI LVDS pair used for DSPI_C TSB mode transmission DSPI_C_SOUT_LVDS DSPI_C_SOUT_LVDS+ DSPI LVDS pair used for DSPI_C TSB mode transmission DSPI_B_PCS[0] DSPI_C_PCS[0] DSPI_D_PCS[0] DSPI_B – DSPI_D Peripheral chip select when device is in master mode—slave select when used in slave mode DSPI_B_PCS[1:5] DSPI_C_PCS[1:5] DSPI_D_PCS[1:5] DSPI_B – DSPI_D Peripheral chip select when device is in master mode—not used in slave mode DSPI_B_SCK DSPI_C_SCK DSPI_D_SCK DSPI_B – DSPI_D DSPI clock—output when device is in master mode; input when in slave mode DSPI_B_SIN DSPI_C_SIN DSPI_D_SIN DSPI_B – DSPI_D DSPI data in DSPI_B_SOUT DSPI_C_SOUT DSPI_D_SOUT DSPI_B – DSPI_D DSPI data out eMIOS[0:23] eMIOS eMIOS I/O channels AN[0:39] eQADC Single-ended analog inputs for analog-to-digital converter AN[0:7]/DAN+ eQADC Differential analog input pair for analog-to-digital converter with pull-up/pull-down functionality AN[0:7]/DAN eQADC Differential analog input pair for analog-to-digital converter with pull-up/pull-down functionality FCK eQADC eQADC free running clock for eQADC SSI MA[0:2] eQADC These three control bits are output to enable the selection for an external Analog Mux for expansion channels. REFBYPC eQADC Bypass capacitor input SDI eQADC Serial data in SDO eQADC Serial data out SDS eQADC Serial data select VRH eQADC Voltage reference high input VRL eQADC Voltage reference low input SCI_A_RX SCI_B_RX SCI_C_RX eSCI_A – eSCI_C eSCI receive SCI_A_TX SCI_B_TX SCI_C_TX eSCI_A – eSCI_C eSCI transmit ETPU_A[0:31] eTPU eTPU I/O channel Table 5. Signal details (continued) Signal Module or function Description |
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