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LTM8031MPV#PBF bảng dữ liệu(PDF) 13 Page - Linear Technology

tên linh kiện LTM8031MPV#PBF
Giải thích chi tiết về linh kiện  Ultralow Noise EMC 36V, 1A DC/DC 關Module Regulator
PDF  22 Pages
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nhà sản xuất  LINER [Linear Technology]
Trang chủ  http://www.linear.com
Logo LINER - Linear Technology

LTM8031MPV#PBF bảng dữ liệu(HTML) 13 Page - Linear Technology

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LTM8031
13
8031fb
applicaTions inForMaTion
4. Place the CIN and COUT capacitors such that their
ground currents flow directly adjacent or underneath
the LTM8031.
5. Connect all of the GND connections to as large a copper
pour or plane area as possible on the top layer. Avoid
breaking the ground connection between the external
components and the LTM8031.
6. Use vias to connect the GND copper area to the board’s
internalgroundplane.LiberallydistributetheseGNDvias
to provide both a good ground connection and thermal
path to the internal planes of the printed circuit board.
Hot-Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LTM8031. However, these capacitors
can cause problems if the LTM8031 is plugged into a live
or fast rising or falling supply (see Linear Technology
Application Note 88 for a complete discussion). The low
loss ceramic capacitor combined with stray inductance in
series with the power source forms an under-damped tank
circuit, and the voltage at the VIN pin of the LTM8031 can
ring to twice the nominal input voltage, possibly exceed-
ing the LTM8031’s rating and damaging the part. A similar
phenomenoncanoccurinsidetheLTM8031module,atthe
output of the integrated EMI filter, with the same potential
of damaging the part.
If the input supply is poorly controlled or the user will be
plugging the LTM8031 into an energized supply, the input
networkshouldbedesignedtopreventthisovershoot.Fig-
ure 4 shows the waveforms that result when an LTM8031
circuit is connected to a 24V supply through six feet of 24-
gauge twisted pair. The first plot (4a) is the response with
a 2.2µF ceramic capacitor at the input. The input voltage
Figure 3. Layout Showing Suggested External Components,
GND Plane and Thermal Vias
GND
COUT
CIN
8031 F03
VIN
FIN
RUN/SS
SYNC
AUX
BIAS
VOUT
GND
OPTIONAL
FIN
CAPACITOR



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