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ADP2370ACPZ-3.3-R7 bảng dữ liệu(PDF) 28 Page - Analog Devices |
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ADP2370ACPZ-3.3-R7 bảng dữ liệu(HTML) 28 Page - Analog Devices |
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28 / 32 page ![]() ADP2370/ADP2371 Data Sheet Rev. A | Page 28 of 32 CAPACITOR SELECTION Output Capacitor The ADP2370/ADP2371 are designed for operation with small, space-saving ceramic capacitors, but function with most commonly used capacitors provided that the effective series resistance (ESR) value is carefully considered. The ESR of the output capacitor affects stability of the control loop. A minimum output capaci- tance of 7 µF with an ESR of 10 mΩ or less is recommended to ensure stability of the ADP2370/ADP2371. Transient response to changes in load current is also affected by output capacitance. Using a larger value of output capacitance improves the transient response of the ADP2370/ADP2371 to large changes in load current. Figure 84 shows the transient response for an output capacitance value of 10 µF. M20.0µs A CH1 560mA 1 2 3 T 10.40% CH1 500mA Ω BW CH3 500mA Ω BW CH2 50.0mV B W LOAD CURRENT VOUT INDUCTOR CURRENT Figure 84. Output Transient Response, VOUT2 = 1.8 V, COUT = 10 µF, 300 mA to 800 mA, Load Current Rise Time = 200 ns Input Bypass Capacitor Connecting a 10 µF capacitor from VIN to GND reduces the circuit sensitivity to the PCB layout, especially when long input traces or high source impedance are encountered. If greater than 10 µF of output capacitance is required, increase the input capacitor to match it to improve the transient response. Input and Output Capacitor Properties Use any good quality ceramic capacitors with the ADP2370/ ADP2371; however they must meet the minimum capacitance and maximum ESR requirements. Ceramic capacitors are manu- factured with a variety of dielectrics, each with different behavior over temperature and applied voltage. Capacitors must have a dielectric adequate to ensure the minimum capacitance over the necessary temperature range and dc bias conditions. X5R or X7R dielectric capacitors with a voltage rating of 6.3 V to 25 V are recommended for best performance. Y5V and Z5U dielectrics are not recommended because of their poor temperature and dc bias characteristics. Figure 85 depicts the capacitance vs. voltage bias characteristic of a several 10 µF capacitors in different case sizes and voltage ratings. The voltage stability of a capacitor is strongly influenced by the capacitor size and voltage rating. In general, a capacitor in a larger package or higher voltage rating exhibits better stability. The temperature variation of the X5R dielectric is about ±15% over the −40°C to +85°C temperature range and is not a function of package or voltage rating. 0 1 2 3 4 5 6 7 8 9 10 11 12 0 5 10 15 20 25 30 35 DC BIAS VOLTAGE (V) 10µF/25V/1210 10µF/35V/1210 10µF/16V/0805 10µF/16V/1206 Figure 85. Capacitance vs. Voltage Characteristic Different Case Sizes Use Equation 1 to determine the worst-case capacitance, accounting for capacitor variation over temperature, component tolerance, and voltage. CEFF = CBIAS × (1 − TEMPCO) × (1 − TOL) (1) where: CBIAS is the effective capacitance at the operating voltage. TEMPCO is the worst-case capacitor temperature coefficient. TOL is the worst-case component tolerance. In this example, the worst-case TEMPCO over −40°C to +85°C is assumed to be 15% for an X5R dielectric. The tolerance of the capacitor (TOL) is assumed to be 10%, and CBIAS is 8.53 μF at 12 V for the 10 μF, 35 V capacitor in a 1210 package (see Figure 85). Substituting these values in Equation 1 yields CEFF = 8.53 μF × (1 − 0.15) × (1 − 0.1) = 6.53 μF Therefore, the capacitor chosen in this example meets the minimum capacitance requirement of the ADP2370/ADP2371 over temperature and tolerance at the chosen output voltage. To guarantee the performance of the ADP2370/ADP2371, it is imperative that the effects of dc bias, temperature, and tolerances of the capacitors are evaluated for each application. |
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