Wideband Synthesizer

with Integrated VCO

Data Sheet

ADF4351

Rev. 0

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FEATURES

Output frequency range: 35 MHz to 4400 MHz

Fractional-N synthesizer and integer-N synthesizer

Low phase noise VCO

Programmable divide-by-1/-2/-4/-8/-16/-32/-64 output

Typical jitter: 0.3 ps rms

Typical EVM at 2.1 GHz: 0.4%

Power supply: 3.0 V to 3.6 V

Logic compatibility: 1.8 V

Programmable dual-modulus prescaler of 4/5 or 8/9

Programmable output power level

RF output mute function

3-wire serial interface

Analog and digital lock detect

Switched bandwidth fast lock mode

Cycle slip reduction

APPLICATIONS

Wireless infrastructure (W-CDMA, TD-SCDMA, WiMAX,

GSM, PCS, DCS, DECT)

Test equipment

Wireless LANs, CATV equipment

Clock generation

GENERAL DESCRIPTION

The ADF4351 allows implementation of fractional-N or integer-N

phase-locked loop (PLL) frequency synthesizers when used with

an external loop filter and external reference frequency.

The ADF4351 has an integrated voltage controlled oscillator (VCO)

with a fundamental output frequency ranging from 2200 MHz to

4400 MHz. In addition, divide-by-1/-2/-4/-8/-16/-32/-64 circuits

allow the user to generate RF output frequencies as low as 35 MHz.

For applications that require isolation, the RF output stage can be

muted. The mute function is both pin- and software-controllable.

An auxiliary RF output is also available, which can be powered

down when not in use.

Control of all on-chip registers is through a simple 3-wire interface.

The device operates with a power supply ranging from 3.0 V to

3.6 V and can be powered down when not in use.

FUNCTIONAL BLOCK DIAGRAM

MUXOUT

LD

SW

TEMP

CLK

DATA

LE

AGND

CE

DGND

PHASE

COMPARATOR

FAST LOCK

SWITCH

CHARGE

PUMP

OUTPUT

STAGE

OUTPUT

STAGE

MULTIPLEXER

10-BIT R

COUNTER

÷2

DIVIDER

×2

DOUBLER

FUNCTION

LATCH

DATA REGISTER

INTEGER

VALUE

N COUNTER

FRACTION

VALUE

THIRD-ORDER

FRACTIONAL

INTERPOLATOR

MODULUS

VALUE

MULTIPLEXER

LOCK

DETECT

÷1/2/4/8/16/

32/64

ADF4351

VCO

CORE

Figure 1.