AD823AARZ-R7 datasheet(19/20 Pages) AD

19 / 20 page

Data Sheet

AD823A

Rev. | Page 19 of 20

MAXIMIZING PERFORMANCE THROUGH PROPER

LAYOUT

To achieve the maximum performance of the extremely high

input impedance and low offset voltage of the AD823A, care

should be taken in the circuit board layout. The PCB surface

must remain clean and free of moisture to avoid leakage currents

between adjacent traces. Surface coating of the circuit board

reduces surface moisture and provides a humidity barrier, reducing

parasitic resistance on the board. The use of guard rings around the

amplifier inputs further reduces leakage currents. Figure 48 shows

how the guard rings should be configured, and Figure 49 shows

the top view of how a surface-mount layout can be arranged. The

guard ring does not need to be a specific width, but it should form

a continuous loop around both inputs. By setting the guard ring

voltage equal to the voltage at the non-inverting input, parasitic

capacitance is minimized as well. For further reduction of leakage

currents, components can be mounted to the PCB using Teflon®

standoff insulators.

VOUT

VIN

AD823A

VIN

AD823A

VIN

AD823A

Figure 48. Guard Ring Layout and Connections to

Reduce PCB Leakage Currents

V–

V+

VREF

VIN1

VIN2

GUARD

RING

AD823A

GUARD

RING

Figure 49. Top View of AD823A SOIC Layout with Guard Rings

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