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SX8663 bảng dữ liệu(PDF) 57 Page - Semtech Corporation |
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SX8663 bảng dữ liệu(HTML) 57 Page - Semtech Corporation |
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57 / 64 page ![]() ADVANCED COMMUNICATIONS & SENSING Rev5 4 th August 2011 © 2011 Semtech Corp. www.semtech.com 57 SX8663 Capacitive Button Matrix (up to 36) and Proximity Controller with Individual LED Drivers and Buzzer Output 6.6 SPM Gateway Registers The SX8663 I2C interface offers two registers for exchanging the SPM data with the host. • SpmCfg • SpmBaseAddr Address Name Bits Description 7:6 00: Reserved 5:4 Defines the normal operation or SPM mode 00: I2C in normal operation mode (default) 01: I2C in SPM mode 10: Reserved 11: Reserved 3 Defines r/w direction of SPM 0: SPM write access (default) 1: SPM read access 0x0D SpmCfg 2:0 000: Reserved Table 23 SPM access configuration Address Name Bits Description 0x0E SpmBaseAddr 7:0 SPM Base Address (modulo 8). The lowest address is 0x00 (default) The highest address is 0x78. Table 24 SPM Base Address The exchange of data, read and write, between the host and the SPM is always done in bursts of eight bytes. The base address of each burst of eight bytes is a modulo 8 number, starting at 0x00 and ending at 0x78. The registers SpmKeyMsb and SpmKeyLsb are required for NVM programming as described in section 6.7. Address Name Bits Description 0xAC SpmKeyMsb 7:0 SPM to NVM burn Key MSB Unlock requires writing data: 0x62 Table 25 SPM Key MSB at I2C register address 0xAC Address Name Bits Description 0xAD SpmKeyLsb 7:0 SPM to NVM burn Key LSB Unlock requires writing data: 0x9D Table 26 SPM Key LSB |
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