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PCF2111CP bảng dữ liệu(PDF) 9 Page - NXP Semiconductors |
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PCF2111CP bảng dữ liệu(HTML) 9 Page - NXP Semiconductors |
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9 / 24 page ![]() 1997 Mar 28 9 Philips Semiconductors Product specification LCD drivers PCF21xxC family 7 FUNCTIONAL DESCRIPTION An LCD segment or LED output is activated when the corresponding DATA bit is HIGH. 7.1 PCF2100C When DATA bit 21 is HIGH, the A-latches (BP1) are loaded. With DATA bit 21 LOW, the B-latches (BP2) are loaded. CLB pulse 23 transfers data from the shift register to the selected latches. 7.2 PCF2111C When DATA bit 33 is HIGH, the A-latches (BP1) are loaded. With DATA bit 33 LOW, the B-latches (BP2) are loaded. CLB pulse 35 transfers data from the shift register to the selected latches. 7.3 PCF2112C When DATA bit 33 is HIGH, the latches are loaded. CLB pulse 35 transfers data from the shift register to the selected latches. 7.4 Bus control logic The following tests are carried out by the bus control logic: 1. Test on leading zero 2. Test on number of DATA bits 3. Test of disturbed DLEN and DATA signals during transmission. If one of the test conditions is not fulfilled, no action follows the load condition (load pulse with DLEN LOW) and the driver is ready to receive new data. Fig.7 CBUS data format. handbook, full pagewidth DLEN CLB DATA 1 01 S1 1 S1 2 S2 2 S2 3 S3 3 S3 4 S4 4 S4 5 S5 5 S5 6 S6 6 S6 7 S7 7 S7 31 S31 19 S19 2 3 4 5 678 32 20 33 21 34 22 35 23 PCF2111C and PCF2112C PCF2100C PCF2111C and PCF2112C load bit load pulse leading zero test leading zero 32 S32 20 S20 33 21 PCF2100C bit number output MLD296 |
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