ANALOG PRODUCTS DIVISION

561 E. Elliot Road #175 Chandler, AZ 85225 Tel: (480) 539-2900. Fax: (480) 632-1715

www.protekanalog.com

PA5331

Low Power 24-Bit, Stereo Audio CODEC

With Headphone Amplifier

95250 Rev.0. 01/10

NOT FOR USE IN LIFE SUPPORT SYSTEMS

SPI_DIN

SPI_CLK

SPI_CSn

T

SPICS

T

SPISC

T

SPIDS

T

SPIDH

T

SPICH

T

SPICL

T

SPISH

Serial Control Port SPI Timing

S

P

SDA

SCL

T

TWSTS

T

TWSTH

T

TWCH

T

TWCL

T

TWDH

T

TWDS

T

TWF

T

TWR

S

T

TWID

Serial Control Port 2-wire Timing

CLOCK MODES AND SAMPLING FREQUENCIES

According to the input serial audio data sampling frequency, the device can work in two speed modes: single speed or double speed.

The ranges of the sampling frequency in these two modes are listed in Table 1. The device can work either in master clock mode or

slave clock mode.

In slave mode, LRCK and SCLK are supplied externally. LRCK and SCLK must be synchronously derived from the system clock with

specific rates. The device can auto detect MCLK/LRCK ratio according to Table 1. The device only supports the MCLK/LRCK ratios

listed in Table 1. The LRCK/SCLK ratio is normally 64.

Table 1 Slave Mode Sampling Frequencies and MCLK/LRCK Ratio

Speed Mode

Sampling Frequency

MCLK/LRCK Ratio

Single Speed

8kHz

– 50kHz

256, 384, 512, 768, 1024

Double Speed

50kHz

– 100kHz

128, 192, 256, 384, 512

In master mode, LRCK and SCLK are derived internally from MCLK. The available MCLK/LRCK ratios and SCLK/LRCK ratios are

listed in Table 2Table 2 Master Mode Sampling Frequencies and MCLK/LRCK Ratio