HT95R22 datasheet(20/52 Pages) HOLTEK

20 / 52 page

HT95R22

Rev. 1.00

January 6, 2009

Configuring the Pulse Width Measurement Mode

This mode is only available for Timer/Event Counter 0.

In this mode, Timer/Event Counter 0 can be utilised to

measure the width of external pulses applied to the ex-

ternal timer pin. To operate in this mode, the Operating

Mode Select bit pair in the Timer Control Register must

be set to the correct value as shown.

Control Register Operating Mode

Select Bits for the Pulse Width

Measurement Mode

Bit7 Bit6

In this mode the internal clock is used as the

Timer/Event Counter 0 clock. After the other bits in the

Timer Control Register have been setup, the enable bit,

which is bit 4 of the Timer Control Register, can be set

high to enable Timer/Event Counter 0, however it will not

actually start counting until an active edge is received on

the external timer pin.

If the Active Edge Select bit, which is bit 3 of the Timer

Control Register, is low, once a high to low transition has

been received on the external timer pin, Timer/Event

Counter 0 will start counting until the external timer pin

returns to its original high level. At this point the enable

bit will be automatically reset to zero and Timer/Event

Counter 0 will stop counting. If the Active Edge Select bit

is high, Timer/Event Counter 0 will begin counting once

a low to high transition has been received on the exter-

nal timer pin and stop counting when the external timer

pin returns to its original low level. As before, the enable

bit will be automatically reset to zero and Timer/Event

Counter 0 will stop counting. It is important to note that in

the Pulse Width Measurement Mode, the enable bit is

automatically reset to zero when the external control

signal on the external timer pin returns to its original

level, whereas in the other two modes the enable bit can

only be reset to zero under program control.

The residual value in Timer/Event Counter 0, which can

now be read by the program, therefore represents the

length of the pulse received on the external timer pin. As

the enable bit has now been reset, any further transi-

tions on the external timer pin will be ignored. Not until

the enable bit is again set high by the program can the

timer begin further pulse width measurements. In this

way, single shot pulse measurements can be easily

made.

It should be noted that in this mode Timer/Event Counter

0 is controlled by logical transitions on the external timer

pin and not by the logic level. When Timer/Event Coun-

ter 0 is full and overflows, an interrupt signal is gener-

ated and Timer/Event Counter 0 will reload the value

already loaded into the preload register and continue

counting. The interrupt can be disabled by ensuring that

the Timer/Event Counter 0 Interrupt Enable bit in the In-

terrupt Control Register, is reset to zero.

To ensure that the timer pin is configured to operate as a

pulse width measurement pin the Timer Control Regis-

ter must place Timer/Event Counter 0 in the Pulse Width

Measurement Mode.

Programming Considerations

When configured to run in the timer mode, the internal

system clock is used as the timer clock source and is

therefore synchronized with the overall operation of the

microcontroller. In this mode, when the appropriate

timer register is full, the microcontroller will generate an

internal interrupt signal directing the program flow to the

respective internal interrupt vector. For the pulse width

measurement mode, the internal system clock is also

used as the timer clock source but the timer will only run

when the correct logic condition appears on the external

timer input pin. As this is an external event and not syn-

chronised with the internal timer clock, the

microcontroller will only see this external event when the

next timer clock pulse arrives. As a result there may be

small differences in measured values requiring pro-

grammers to take this into account during programming.

The same applies if the timer is configured to be in the

event counting mode which again is an external event

and not synchronised with the internal system or timer

clock.

+ 1

+ 2

+ 3

+ 4

T i m e r

E x t e r n a l T i m e r

P i n I n p u t

T O N ( w i t h T E = 0 )

P r e s c a l e r O u t p u t

I n c r e m e n t

T i m e r C o u n t e r

P r e s c a l e r O u t p u t i s s a m p l e d a t e v e r y f a l l i n g e d g e o f T 1 .

Pulse Width Measure Mode Timing Diagram

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