LIS33DE

Application hints

Doc ID 15596 Rev 1

15/31

4

Application hints

Figure 5.

LIS33DE electrical connection

The device core is supplied through Vdd line while the I/O pads are supplied through

Vdd_IO line. Power supply decoupling capacitors (100 nF ceramic, 10 µF Al) should be

placed as near as possible to the pin 14 of the device (common design practice).

All the voltage and ground supplies must be present at the same time to have proper

behavior of the IC (refer to

Figure 5). It is possible to remove Vdd maintaining Vdd_IO

without blocking the communication bus, in this condition the measurement chain is

powered off.

The functionality of the device and the measured acceleration data is selectable and

The functions, the threshold and the timing of the interrupt pin (INT) can be completely

4.1

Soldering information

The LGA package is compliant with the ECOPACK®, RoHS and “Green” standard.

It is qualified for soldering heat resistance according to JEDEC J-STD-020C.

Leave “Pin 1 Indicator” unconnected during soldering.

10uF

Vdd

100nF

GND

Vdd_IO

INT

Digital signal from/to signal controller.Signal’s levels are defined by proper selection of Vdd_IO

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