PIC16LF1503 datasheet(12/340 Pages) MICROCHIP

12 / 340 page

PIC16(L)F1503

DS41607A-page 12

Preliminary

 2011 Microchip Technology Inc.

RC0/AN4/C2IN+/CLC2/SCL/

SCK

RC0

TTL

CMOS General purpose I/O.

AN4

—

A/D Channel input.

C2IN+

—

Comparator C2 positive input.

CLC2

—

CMOS Configurable Logic Cell source output.

SCL

I2COD

I2C™ clock.

SCK

CMOS SPI clock.

RC1/AN5/C1IN1-/C2IN1-/PWM4/

NCO1(1)/SDA/SDI

RC1

TTL

CMOS General purpose I/O.

AN5

—

A/D Channel input.

C1IN1-

—

Comparator C1 negative input.

C2IN1-

—

Comparator C2 negative input.

PWM4

—

CMOS Pulse Width Module source output.

NCO1

—

CMOS Numerically Controlled Oscillator is source output.

SDA

I2COD

I2C data input/output.

SDI

CMOS

—

SPI data input.

RC2/AN6/C1IN2-/C2IN2-/SDO(1)

RC2

TTL

CMOS General purpose I/O.

AN6

—

A/D Channel input.

C1IN2-

—

Comparator C1 negative input.

C2IN2-

—

Comparator C2 negative input.

SDO

—

CMOS SPI data output.

RC3/AN7/C1IN3-/C2IN3-/PWM2/

CLC2IN0

RC3

TTL

CMOS General purpose I/O.

AN7

—

A/D Channel input.

C1IN3-

—

Comparator C1 negative input.

C2IN3-

—

Comparator C2 negative input.

PWM2

—

CMOS Pulse Width Module source output.

CLC2IN0

—

Configurable Logic Cell source input.

RC4/C2OUT/CLC2IN1/CWG1B

RC4

TTL

CMOS General purpose I/O.

C2OUT

—

CMOS Comparator C2 output.

CLC2IN1

—

Configurable Logic Cell source input.

CWG1B

—

CMOS CWG complementary output.

RC5/PWM1/CLC1(2)/

CWG1A

RC5

TTL

CMOS General purpose I/O.

PWM1

—

CMOS PWM output.

CLC1

—

CMOS Configurable Logic Cell source output.

CWG1A

—

CMOS CWG primary output.

VDD

Power

—

Positive supply.

VSS

Power

—

Ground reference.

TABLE 1-2:

PIC16(L)F1503 PINOUT DESCRIPTION (CONTINUED)

Name

Function

Input

Type

Output

Type

Description

Legend: AN = Analog input or output CMOS= CMOS compatible input or output

= Open Drain

TTL = TTL compatible input

= Schmitt Trigger input with CMOS levels I2C™ = Schmitt Trigger input with I2C

HV = High Voltage

XTAL = Crystal

levels

Note 1: Default location for peripheral pin function. Alternate location can be selected using the APFCON register.

2: Alternate location for peripheral pin function selected by the APFCON register.

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