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TJ2997GD bảng dữ liệu(PDF) 10 Page - HTC Korea TAEJIN Technology Co. |
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TJ2997GD bảng dữ liệu(HTML) 10 Page - HTC Korea TAEJIN Technology Co. |
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10 / 13 page ![]() DDR Termination Regulator TJ2997 Apr, 2011 - R1.0.1 10/13 HTC FIGURE 4. SSTL-2 Implementation with higher voltage rails DDR-II APPLICATIONS With the separate VDDQ pin and an internal resistor divider it is possible to use the TJ2997 in applications utilizing DDR-II memory. Figure 3 and Figure 4 show several implementations of recommended circuits. Figure 3 shows the recommended circuit configuration for DDR-II applications. The output stage is connected to the 1.8V rail and the AVIN pin can be connected to either a 3.3V or 5V rail. FIGURE 5. Recommended DDR-II Termination If it is not desirable to use the 1.8V rail it is possible to connect the output stage to a 3.3V rail. Care should be taken to do not exceed the maximum junction temperature as the thermal dissipation increases with lower VTT output voltages. For this reason it is not recommended to power PVIN off a rail higher than the nominal 3.3V. The advantage of this configuration is that it has the ability to source and sink a higher maximum continuous current. FIGURE 6. DDR-II Termination with higher voltage rails |
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