Mechanical and electrical characteristics

L3G4200D

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Doc ID 17116 Rev 3

2.4

Communication interface characteristics

2.4.1

SPI - serial peripheral interface

Subject to general operating conditions for Vdd and Top.

Figure 4.

Table 7.

SPI slave timing values

Symbol

Parameter

Unit

Min.

Max.

tc(SPC)

SPI clock cycle

100

ns

fc(SPC)

SPI clock frequency

10

MHz

tsu(CS)

CS setup time

5

ns

th(CS)

CS hold time

8

tsu(SI)

SDI input setup time

5

th(SI)

SDI input hold time

15

tv(SO)

SDO valid output time

50

th(SO)

SDO output hold time

6

tdis(SO)

SDO output disable time

50

1.

Values are guaranteed at 10 MHz clock frequency for SPI with both 4 and 3 wires, based on characterization results; not

tested in production.

b.

Measurement points are done at 0.2·Vdd_IO and 0.8·Vdd_IO, for both input and output ports.