MSP430F423IPMR datasheet(11/45 Pages) TI

11 / 45 page

MSP430F42x

MIXED SIGNAL MICROCONTROLLER

SLAS421A − APRIL 2004 − REVISED JUNE 2007

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

flash memory

The flash memory can be programmed via the JTAG port, the bootstrap loader, or in-system by the CPU. The

CPU can perform single-byte and single-word writes to the flash memory. Features of the flash memory include:

D Flash memory has n segments of main memory and two segments of information memory (A and B) of

128 bytes each. Each segment in main memory is 512 bytes in size.

D Segments 0 to n may be erased in one step, or each segment may be individually erased.

D Segments A and B can be erased individually, or as a group with segments 0−n.

Segments A and B are also called information memory.

D New devices may have some bytes programmed in the information memory (needed for test during

manufacturing). The user should perform an erase of the information memory prior to the first use.

Segment 0

With Interrupt Vectors

Segment 1

Segment 2

Segment n−1

Segment n

32KB

Segment A

Segment B

Main Memory

Information Memory

0FFFFh

0FA00h

0FE00h

0FDFFh

0FC00h

0FBFFh

0F9FFh

08400h

083FFh

08200h

081FFh

01000h

010FFh

08000h

01080h

0107Fh

16KB

0FFFFh

0FA00h

0FE00h

0FDFFh

0FC00h

0FBFFh

0F9FFh

0C400h

0C3FFh

0C200h

0C1FFh

01000h

010FFh

0C000h

01080h

0107Fh

8KB

0FFFFh

0FA00h

0FE00h

0FDFFh

0FC00h

0FBFFh

0F9FFh

0E400h

0E3FFh

0E200h

0E1FFh

01000h

010FFh

0E000h

01080h

0107Fh

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