SC900844JVK datasheet(79/118 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

900844

FUNCTIONAL DEVICE OPERATION

POWER SUPPLIES

Figure 44. VCCP Detailed Internal Block Diagram

Main Features

• Uses V15 as the main power supply

• 445 mA maximum continuous output current

• Optimized for a 2.2 µF external filter capacitor with a maximum of 10 m

Ω ESR

• Uses an internal pass FET

• The output for each LDO is monitored for over-current conditions and under-voltage events

VIMG25

VIMG25 is a low drop-out (LDO) fully integrated regulator with a P-CH Pass FET. It is high performance, low noise, and high

PSRR, with a low quiescent current and fast transient response. VIMG25 is actively discharged during shutdown.

VIMG25 shares an input voltage pin (PVINIMG) and a reference ground pin (GNDIMG) with the VIMG28 regulator, yet each

has independent control. Both can be supplied by the VPWR (3.3 V) node.

Table 41. VCCP Control Register Structure and Bits Description

Name

Bits

Description

VCCPCNT (ADDR 0x44 - R/W - Default Value: 0x3C)

CTLVCCP

2:0

VCCP State Control

x0 = Reserved

x1 = Reserved

x2 = Reserved

x3 = Reserved

x4 = OFF

x5 = Low Power

x6 = Active

x7 = Active

AOACCTLVCCP

5:3

VCCP State Control during AOAC Exit (when the Exit pin is EXITSTBY pin is asserted). These bits will be

initialized by the system SPI controller after power up.

X0 = Do not copy

x1 = Do not copy

x2 = Do not copy

x3 = Do not copy

x4 = OFF

x5 = Low Power

x6 = Active

x7 = Active

Reserved

7:6

Reserved

Controller

VOCCP

PVIN1P5

(Shared with VCCPAOAC, VCCPDDR,

VAON , and VMM)

VOUTCCP

Output Monitor

IOCCP

SPI

Interface

COCCP

VOCCP

CTLVCCP

AOACCTLVCCP

VCCPFAULT

VREF

Discharge

FBCCP

GND1P5

(Shared with VCCPAOAC , VCCPDDR,

VAON , and VMM)

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