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MPC5673K bảng dữ liệu(PDF) 105 Page - Freescale Semiconductor, Inc

tên linh kiện MPC5673K
Giải thích chi tiết về linh kiện  Microcontroller is a 32-bit embedded controller designed for advanced
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Electrical characteristics
MPC5675K Microcontroller Data Sheet, Rev. 4
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
105
Figure 24. Functional reset sequence long
Figure 25. Functional reset sequence short
The reset sequences shown in Figure 24 and Figure 25 are triggered by functional reset events. RESET is
driven low during these two reset sequences only if the corresponding functional reset source (which
triggered the reset sequence) was enabled to drive RESET low for the duration of the internal reset
sequence. See the RGM_FBRE register in the MPC5675K Reference Manual (MPC5675KRM) for more
information.
3.21.3
Reset sequence trigger mapping
The following table shows the possible trigger events for the different reset sequences, depending on the
VREG mode (external or internal). It specifies the reset sequence start conditions as well as the reset
sequence end indications that are the basis for the timing data provided in Table 58.
PHASE1,2
PHASE3
DRUN
Reset Sequence Trigger
Reset Sequence Start Condition
RESET
Application
Flash
Init
Device
Config
Execution
TFRL, min < TRESET < TFRL, max
PHASE3
DRUN
Reset Sequence Trigger
Reset Sequence Start Condition
RESET
Application
Execution
TFRS, min < TRESET < TFRS, max



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