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HCS362 bảng dữ liệu(PDF) 14 Page - Microchip Technology |
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HCS362 bảng dữ liệu(HTML) 14 Page - Microchip Technology |
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14 / 46 page ![]() HCS362 DS40189E-page 14 © 2011 Microchip Technology Inc. 3.4 RF Enable and PLL Interface The S3/RFEN pin of the HCS362 can be configured to function as an RF Enable output signal. This is selected by the RF Enable Output (RFEN) configuration option. When enabled, this pin will be driven HIGH before data is transmitted through the DATA pin. The RF Enable and DATA output are synchronized so to interface with RF PLL circuits operating in ASK mode. Figure 3-10 shows the startup sequence. The RFEN signal will go LOW at the end of the last code word, including the Guard time. When the RF Enable output is selected, the S3 pin can still be used as a button input. The debouncing logic will be affected though, considerably reducing the respon- siveness of the button input. FIGURE 3-10: PLL INTERFACE Note: When the RF Enable output feature is used and a four (or more) buttons input configu- ration is required, the use of a scheme sim- ilar to Figure 2-1 (scheme C) is recommended. S[3210] RFEN DATA TTD TRFON Guard Time 1st CODE WORD TG Button Press Button Release 2nd CODE WORD |
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