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HCS361 bảng dữ liệu(PDF) 6 Page - Microchip Technology

tên linh kiện HCS361
Giải thích chi tiết về linh kiện  KEELOQ짰 Code Hopping Encoder incorporates high security,
PDF  42 Pages
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nhà sản xuất  MICROCHIP [Microchip Technology]
Trang chủ  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

HCS361 bảng dữ liệu(HTML) 6 Page - Microchip Technology

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HCS361
DS40146F-page 6
© 2011 Microchip Technology Inc.
3.0
EEPROM MEMORY
ORGANIZATION
The HCS361 contains 192 bits (12 x 16-bit words) of
EEPROM memory (Table 3-1). This EEPROM array is
used to store the encryption key information,
synchronization value, etc. Further descriptions of the
memory array is given in the following sections.
TABLE 3-1:
EEPROM MEMORY MAP
3.1
KEY_0 - KEY_3 (64-Bit Crypt Key)
The 64-bit crypt key is used to create the encrypted
message transmitted to the receiver. This key is calcu-
lated and programmed during production using a key
generation algorithm. The key generation algorithm
may be different from the KEELOQ algorithm. Inputs to
the key generation algorithm are typically the transmit-
ter’s serial number and the 64-bit manufacturer’s code.
While the key generation algorithm supplied from
Microchip is the typical method used, a user may elect
to create their own method of key generation. This may
be done providing that the decoder is programmed with
the
same
means
of
creating
the
key
for
decryption purposes.
3.2
SYNC_A, SYNC_B
(Synchronization Counter)
This is the 16-bit synchronization value that is used to
create the hopping code for transmission. This value is
incremented after every transmission. Separate syn-
chronization counters can be used to stay synchro-
nized with different receivers.
3.3
SEED_0, SEED_1, and SEED_2
(Seed Word)
The three word (48 bits) seed code will be transmitted
when seed transmission is selected. This allows the sys-
tem designer to implement the Secure Learn feature or
use this fixed code word as part of a different key genera-
tion/tracking process or purely as a fixed code transmis-
sion.
3.4
SER_0, SER_1
(Encoder Serial Number)
SER_0 and SER_1 are the lower and upper words of
the device serial number, respectively. There are 32
bits allocated for the Serial Number and a selectable
configuration bit determines whether 32 or 28 bits will
be transmitted. The serial number is meant to be
unique for every transmitter.
WORD
ADDRESS
MNEMONIC
DESCRIPTION
0
KEY_0
64-bit crypt key
(word 0) LSb’s
1
KEY_1
64-bit crypt key
(word 1)
2
KEY_2
64-bit crypt key
(word 2)
3
KEY_3
64-bit crypt key
(word 3) MSb’s
4
SYNC_A
16-bit synch counter
5
SYNC_B/
SEED_2
16-bit synch counter B
or Seed value (word 2)
6
RESERVED
Set to 0000H
7
SEED_0
Seed Value
(word 0) LSb’s
8
SEED_1
Seed Value
(word 1) MSb’s
9
SER_0
Device Serial Number
(word 0) LSb’s
10
SER_1
Device Serial Number
(word 1) MSb’s
11
CONFIG
Configuration Word
Note:
Since SEED2 and SYNC_B share the
same memory location, Secure Learn and
Independent mode transmission (including
IR mode) are mutually exclusive.



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