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P5CD021XD bảng dữ liệu(PDF) 8 Page - NXP Semiconductors

tên linh kiện P5CD021XD
Giải thích chi tiết về linh kiện  Secure dual interface and contact PKI smart card controller
PDF  20 Pages
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nhà sản xuất  NXP [NXP Semiconductors]
Trang chủ  http://www.nxp.com
Logo NXP - NXP Semiconductors

P5CD021XD bảng dữ liệu(HTML) 8 Page - NXP Semiconductors

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P5CD016_021_041_51_Cx081_FAM_SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product short data sheet
PUBLIC
Rev. 3.2 — 14 March 2011
150332
8 of 20
NXP Semiconductors
P5CD016/021/041/051 and P5Cx081
Secure dual interface and contact PKI smart card controller
2.3 Security features
Enhanced security sensors:
Low and high clock frequency sensor
Low and high temperature sensor
Low and high supply voltage sensor
Single Fault Injection (SFI) attack detection
Light sensors (included integrated memory light sensor functionality)
Secure Fetch technology, protecting ROM, RAM and EEPROM code fetch operations
Electronic fuses for safeguarded mode control
Active shielding
Unique ID for each die
Clock input filter for protection against spikes
Power-up and power-down reset
Optional programmable card disable feature
Memory security (encryption and physical measures) for RAM, EEPROM and ROM
Memory Management Unit (MMU) including memory protection:
Secure multi-application operating systems via two different operating modes:
System mode and User mode
OS-controlled access restriction mechanism to peripherals in User mode
Memory mapping up to 8 MB code memory
Memory mapping up to 8 MB data memory
Optional disabling of ROM read instructions by code executed in EEPROM
Optional disabling of any code execution out of RAM
EEPROM programming:
No external clock
Hardware sequencer controlled
On-chip high voltage generation
Enhanced error correction mechanism
64 B or 128 B EEPROM for customer-defined security FabKey, featuring batch-,
wafer- or die-individual security data, included encrypted diversification features on
request
14 B user write-protected security area in EEPROM (byte access, inhibit functionality
per byte)
32 B write-once security area in EEPROM (bit access)
32 B user read-only area in EEPROM (byte access)
Customer-specific EEPROM initialization available



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