CMLDM7002A

CMLDM7002AG*

CMLDM7002AJ

SURFACE MOUNT

DUAL N-CHANNEL

ENHANCEMENT-MODE

SILICON MOSFET

DESCRIPTION:

These CENTRAL SEMICONDUCTOR devices are

dual Enhancement-mode N-Channel Field Effect

Transistors, manufactured by the N-Channel DMOS

Process, designed for high speed pulsed amplifier and

driver applications. The CMLDM7002A utilizes the USA

pinout configuration, while the CMLDM7002AJ utilizes

the Japanese pinout configuration. These devices offer

low rDS (ON) and low VDS(ON).

MARKING CODES: CMLDM7002A:

L02

CMLDM7002AG*: C2G

CMLDM7002AJ:

02J

MAXIMUM RATINGS: (TA=25°C)

SYMBOL

UNITS

Drain-Source Voltage

VDS

60

V

Drain-Gate Voltage

VDG

60

V

Gate-Source Voltage

VGS

40

V

Continuous Drain Current

ID

280

mA

Continuous Source Current (Body Diode)

IS

280

mA

Maximum Pulsed Drain Current

IDM

1.5

A

Maximum Pulsed Source Current

ISM

1.5

A

Power Dissipation (Note 1)

PD

350

mW

Power Dissipation (Note 2)

PD

300

mW

Power Dissipation (Note 3)

PD

150

mW

Operating and Storage Junction Temperature

TJ, Tstg

-65 to +150

°C

Thermal Resistance

ΘJA

357

°C/W

ELECTRICAL CHARACTERISTICS PER TRANSISTOR: (TA=25°C unless otherwise noted)

SYMBOL

TEST CONDITIONS

MIN

MAX

UNITS

IGSSF, IGSSR

VGS=20V, VDS=0

100

nA

IDSS

VDS=60V, VGS=0

1.0

μA

IDSS

VDS=60V, VGS=0, TJ=125°C

500

μA

ID(ON)

VGS=10V, VDS=10V

500

mA

BVDSS

VGS=0, ID=10μA

60

V

VGS(th)

VDS=VGS, ID=250μA

1.0

2.5

V

VDS(ON)

VGS=10V, ID=500mA

1.0

V

VDS(ON)

VGS=5.0V, ID=50mA

0.15

V

VSD

VGS=0, IS=400mA

1.2

V

rDS(ON)

VGS=10V, ID=500mA

2.0

Ω

rDS(ON)

VGS=10V, ID=500mA, TJ=125°C

3.5

Ω

rDS(ON)

VGS=5.0V, ID=50mA

3.0

Ω

rDS(ON)

VGS=5.0V, ID=50mA, TJ=125°C

5.0

Ω

gFS

VDS=10V, ID=200mA

80

mS

* Device is Halogen Free by design

SOT-563 CASE

R5 (18-January 2010)

www.centr a lsemi.com