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PC33892PNC bảng dữ liệu(PDF) 10 Page - Freescale Semiconductor, Inc

tên linh kiện PC33892PNC
Giải thích chi tiết về linh kiện  Quad Intelligent High-Side Switch
PDF  28 Pages
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nhà sản xuất  FREESCALE [Freescale Semiconductor, Inc]
Trang chủ  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

PC33892PNC bảng dữ liệu(HTML) 10 Page - Freescale Semiconductor, Inc

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33892
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
10
STATIC ELECTRICAL CHARACTERISTICS (continued)
Characteristics noted under conditions 4.5 V
≤ VDD ≤ 5.5V, 6V ≤ VPWR ≤ 27 V, -40°C ≤ TJ ≤ 150°C unless otherwise noted. Typical
values noted reflect the approximate parameter mean at TA = 25°C under nominal conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
CONTROL INTERFACE
Input Logic High Voltage (Note 17)
VIH
0.7VDD
–
–
V
Input Logic Low Voltage (Note 17)
VIL
–
–
0.2VDD
V
Input Logic Voltage Hysteresis (Note 17)
VIN(HYS)
100
350
750
mV
Input Logic Pull-Down Current (SCLK, IN, SI, IN[0:3])
IDWN
5.0
–
20
µA
RST
Input Voltage Range
VRST
4.5
5.0
5.5
V
SO, FS Tri-State Capacitance (Note 18)
CSO
–
–
20
pF
Input Logic Pull-Down Resistor (RST) and WAKE
IDWN
100
200
400
k
Ω
Input Capacitance (Note 19)
CIN
–
4.0
12
pF
Wake Input Clamp Voltage (Note 20)
ICL(WAKE) < 2.5 mA
VCL(WAKE)
7.0
–
14
V
Wake Input Forward Voltage
ICL(WAKE) = -2.5 mA
VF(WAKE)
-2.0
–
-0.3
V
SO High-State Output Voltage
IOH = 1.0 mA
VSOH
0.8VDD
–
–
V
FS
, SO Low-State Output Voltage
IOL = -1.6 mA
VSOL
–
0.2
0.4
V
SO Tri-State Leakage Current
CS
> 0.7 VDD
ISO(LEAK)
-5.0
0
5.0
µA
Input Logic Pull-Up Current (Note 21)
CS
, VIN > 0.7 VDD
IUP
5.0
–
20
µA
FSI Input terminal External Pull-Down Resistance (Note 22)
FSI Disabled, HS[0:3] Indeterminate
FSI Enabled, all HS OFF
FSI Enabled, HS0 ON, HS[1:3] OFF
FSI Enabled, HS0 and HS2 ON, HS1 and HS3 OFF
RFS
RFSdis
RFSoffoff
RFSonoff
RFSonon
–
6.0
15
30
0
6.5
17
Infinite
1.0
7.0
19
–
k
Ω
Notes
17.
Upper and lower logic threshold voltage range applies to SI, CS, SCLK, RST, IN[0:3], and WAKE input signals. The WAKE and RST signals
may be supplied by a derived voltage referenced to VPWR.
18.
Parameter is guaranteed by process monitoring but is not production tested.
19.
Input capacitance of SI, CS, SCLK, RST, and WAKE. This parameter is guaranteed by process monitoring but is not production tested.
20.
The current must be limited by a series resistance when using voltages > 7.0 V.
21.
Pull-up current is with CS OPEN. CS has an active internal pull-up to VDD.
22.
The selection of the RFS must take into consideration the tolerance, temperature coefficient and lifetime duration to assure that the resistance
value will always be within the desired (specified) range.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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