33892

MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA

12

POWER OUTPUT TIMING HS0, HS1, HS2, AND HS3 (continued)

Overcurrent High Detection Blanking Time

1.0

10

20

µs

CS

to CSNS Valid Time (Note 27)

–

–

10

µs

Watchdog Timeout (WD[1:0]) (Note 28)

00

01

10

11

496

248

2000

1000

620

310

2500

1250

806

403

3250

1625

ms

Notes

27.

Time necessary for the CSNS to be with ±5% of the targeted value.

28.

Watchdog timeout delay measured from the rising edge of WAKE or RST from a sleep state condition, to output turn-ON with the output driven

timeouts.

DYNAMIC ELECTRICAL CHARACTERISTICS (continued)

Characteristics noted under conditions 4.5 V

Characteristic

Symbol

Min

Typ

Max

Unit

Freescale Semiconductor, Inc.

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