SY89823LHC datasheet(4/8 Pages) MICREL

4 / 8 page

Precision Edge®

SY89823L

Micrel, Inc.

M9999-091908

hbwhelp@micrel.com or (408) 955-1690

DC ELECTRICAL CHARACTERISTICS(5)

LVCMOS/LVTTL V

CCI = 3.3V ± 5%; VCCO = 1.8V ± 10%; TA = –40°C to +85°C, unless otherwise stated.

Symbol

Parameter

Condition

Min

Typ

Max

Units

Input HIGH Voltage

2.0

——

Input LOW Voltage

——

0.8

Input HIGH Current

+20

—–250

µA

Input LOW Current

——

–600

µA

VCCI = 3.3V ± 5%; VCCO = 1.8V ± 10%; All outputs loaded with 50Ω to GND; TA = –40°C to +85°C, unless otherwise stated.

Symbol

Parameter

Condition

Min

Typ

Max

Units

fMAX

Maximum Operating Frequency

VOUT ≥ 450mV

500

——

MHz

tpd

Propagation Delay

CLK-to-Q

Note 7

0.8

—

1.3

SEL-to-Q

Note 7

0.8

1.2

1.7

tSKEW

Within-Device Skew

Note 8

——

tSKPP

Part-to-Part Skew

Note 9

——

200

Vpp

Minimum Input Swing

Note 10

600

——

LVPECL_CLK

VCMR

Common Mode Range

Note 11

–1.5

—–0.4

LVPECL_CLK

OE Set-Up Time

Note 12

1.0

——

OE Hold Time

0.5

——

tr, tf

Output Rise/Fall Time (20% – 80%)

300

—

700

tJITTER

Cycle-to-Cycle Jitter

Note 13

1psRMS

Notes:

5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.

6. High-frequency AC-parameters are guaranteed by design and characterization.

7. Differential propagation delay is defined as the delay from the crossing point of the differential input signals to the crossing point of the

differential output signals.

8. The within-device skew is defined as the worst case difference between any two similar delay paths within a single device operating at the

same voltage and temperature.

9. The part-to-part skew is defined as the absolute worst case difference between any two delay paths on any two devices operating at the same

voltage and temperature.

10. The VPP(min) is defined as the minimum input differential voltage which will cause no increase in the propagation delay.

11. VCMR is defined as the range within which the VIH level may vary, with the device still meeting the propagation delay specification. The

numbers in the table are referenced to VCCI. The VIL level must be such that the peak-to-peak voltage is less than 1.0V and greater than or

equal to VPP(min). The lower end of the CMR range varies 1:1 with VCCI. The VCMR(min) will be fixed at 3.3V – |VCMR(min)|.

12. OE set-up time is defined with respect to the rising edge of the clock. OE HIGH to LOW transition ensures outputs remain disabled during the

next clock cycle. OE LOW-to-HIGH transition enables normal operation of the next input clock.

13. Cycle-to-cycle jitter definition: The variation of periods between adjacent cycles, Tn–Tn–1 where T is the time between rising edges of the

output signal.

AC ELECTRICAL CHARACTERISTICS(6)

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