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LC651102F bảng dữ liệu(PDF) 5 Page - Sanyo Semicon Device |
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LC651102F bảng dữ liệu(HTML) 5 Page - Sanyo Semicon Device |
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5 / 14 page  No. 5894-5/14 LC65P29 Pin Descriptions Pin name Number I/O Function Option State during reset Function in of pins PROM mode Power supply. Must be connected to +5 V during normal operation. Power supply. Must be connected to 0 V during normal operation. — — VDD VSS 1 1 — — System clock oscillator connections. Leave OSC2 open and input the external clock to OSC1 if an external clock is used. 1.Two-pin RC oscillator (Single-pin external clock input) 2.Two-pin ceramic oscillator 3.Divisor option: 1/1, 1/3, or 1/4 EPROM contorol signal inputs CE TA OSC1/CE OSC2/TA 1 I O • I/O ports A0 to A3 Input in 4-bit units (IP instruction) Output in 4-bit units (OP instruction) Data testing in 1-bit units (BP and BNP instructions) Data set and clear operations in 1-bit units (SPB and RPB instructions) • PA3 is used for standby mode control. • Applications must assure that chattering (key bounce) noise is not input during a HALT instruction execution cycle. Open-drain output • High-level output (The n-channel output transistor turned off.) • Address inputs A6 to A9 PA0/A6 PA1/A7 PA2/A8 PA3/A9 4 I/O • I/O ports C0 to C3 The pin functions are identical to those of pins A0 to A3. However, there is no standby mode control function. • The output during a reset can be specified to be either high or low as an option. 1. Open-drain output 2. High-level output during reset 3. Low-level output during reset • Selection of items 2 or 3 is in 4-bit units. • High-level output • Low-level output (Depending on an option selection.) • Data I/O D0 to D3 PC0/D0 PC1/D1 PC2/D2 PC3/D3 4 I/O • I/O ports D0 to D3 The pin functions are identical to those of pins PC0 to PC3. The same as for pins PC0 to PC3 The same as pins PC0 to PC3 • Data I/O D4 to D7 PD0/D4 PD1/D5 PD2/D6 PD3/D7 4 I/O • When comparator input is selected: CMP0 and CMP1 use VREF0 as the reference voltage, CMP2 and CMP3 use VREF1 as the reference voltage, • Comparator inputs CMP0 to CMP3 Data input in 4-bit units (IP instruction) • Data testing in 1-bit units (BP and BNP instructions) 1. Comparator input 2. Port E input 3. No feedback resistor 4. Feedback resistor present • Selection of items 1 or 2 is in 4-bit units. • Items 3 and 4 are only specified when item 1 is selected. • Address inputs A0 to A3 PE0/CMP0/A0 PE1/CMP1/A1 PE2/CMP2/A2 PE3/CMP3/A3 4 I • Comparator reference voltage inputs VREF0 and VREF1 VREF0 is the reference voltage input for CMP0 and CMP1. VREF1 is the reference voltage input for CMP2 and CMP3. • When PE0/CMP0 to PE3/CMP3 are selected to function as port E inputs, these pins are connected to VSS. • Address inputs A4 and A5 • EPROM control signal input DASEC VREF0/A4 VREF1/A5/ DASEC 2 I • System reset input • Connect an external capacitor to effect the power-on reset. • Input a low level for at least 4 clock cycles to effect a reset restart. • EPROM control signal input VPP/ OE RES/VPP/OE 1 I • IC test pin This pin must be connected to VSS during normal operation. • EPROM control signal input EPMOD TEST/EPMOD 1 I • When input is selected for port E • Input ports E0 to E3 Input in 4-bit units (IP instruction) • Data testing in 1-bit units (BP and BNP instructions) 4 I |
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