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MPC8308 bảng dữ liệu(PDF) 15 Page - Freescale Semiconductor, Inc |
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MPC8308 bảng dữ liệu(HTML) 15 Page - Freescale Semiconductor, Inc |
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15 / 90 page ![]() MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 2 Freescale Semiconductor 15 DUART Figure 7 provides the AC test load for the DDR2 bus. Figure 7. DDR2 AC Test Load 7DUART This section describes the DC and AC electrical specifications for the DUART interface. 7.1 DUART DC Electrical Characteristics Table 19 provides the DC electrical characteristics for the DUART interface. 7.2 DUART AC Electrical Specifications Table 20 provides the AC timing parameters for the DUART interface. 8 Ethernet: Three-Speed Ethernet, MII Management This section provides the AC and DC electrical characteristics for three-speed, 10/100/1000, and MII management. MPC8308 supports dual Ethernet controllers. Table 19. DUART DC Electrical Characteristics Parameter Symbol Min Max Unit High-level input voltage VIH 2.1 NVDD + 0.3 V Low-level input voltage NVDD VIL –0.3 0.8 V High-level output voltage, IOH = –100 μAVOH NVDD – 0.2 — V Low-level output voltage, IOL = 100 μAVOL —0.2 V Input current (0 V ≤VIN ≤ NVDD)IIN —± 5 μA Table 20. DUART AC Timing Specifications Parameter Value Unit Notes Minimum baud rate 256 baud — Maximum baud rate > 1,000,000 baud 1 Oversample rate 16 — 2 Notes: 1. Actual attainable baud rate is limited by the latency of interrupt processing. 2. The middle of a start bit is detected as the 8th sampled 0 after the 1-to-0 transition of the start bit. Subsequent bit values are sampled each 16th sample. Output Z0 = 50 Ω RL = 50 Ω GVDD/2 |
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