11. DEFECT

The mirrored surface level is maintained by the capacitor for LF2 (pin 59); when a drop in the EFM signal (RFSM output)

reaches 0.35 V or more, a high signal is output to DEF (pin 49). If DEF (pin 49) goes high, the tracking servo enters THLD

mode. In order to prevent the tracking servo from entering THLD mode when a defect is detected, prevent DEFECT from

being output by either shorting DEF (pin 49) to GND, or shorting LF2 (pin 59) to GND. The DEFECT output is driven by

constant current (approximately 100 µA).

12. Microprocessor interface

Because the Reset (Nothing) command initializes the LA9230M and the LA9231M, it must be used carefully.

The LA9230M/LA9231M command acceptance (mode switching) timing is defined by the internal clock (4.23 MHz divided

to 130 kHz) after the falling edge of CE (RWC); therefore, when commands are sent consecutively, CE must go low for at

least 10 µsec. / The 4.23 MHz clock is required for that reason. 2BYTE-COMMAND DETECT and 2BYTE-COMMAND

RESET are used only for the purpose of masking two-byte data.

All instructions can be input by setting CE high and sending commands synchronized with the CL clock from the

microprocessor to DAT (pin 52) in LSB first format. Note that the command is executed at the falling edge of CE.

13. Reset circuit

14. Pattern design notes

To prevent signal jump-in from CV

: RF system

: SERVO system, DIGITAL system

AGND (pin 22)

: RF system, SERVO system

DGND (pin 45)

: DIGITAL system

NC (pins 46*, 47, 48, and 55)

: No connection

*Only for LA9230M

EFM signal

(RFSM output)

LF2 (pin 59)

DEF (pin 49)

Timing

*The DSP pin names are shown in parentheses.

LA9230M/9231M

No.5189 - 10/20