LM3464 datasheet(12/22 Pages) NSC

12 / 22 page

As the system enters steady state, the rail voltage V

RAIL de-

creases and finally settles to an optimal level that maintains

the maximum power efficiency of the system. The voltage

level of V

RAIL under steady state can be calculated following

this equation:

RAIL = Vf(highest) + VVDHC

In the equation, V

RAIL is the rail voltage in steady state and

f(highest) is the total forward voltage of the LED string which

carry the highest forward voltage among the LED stings.

VDHC is the voltage at the VDHC pin. This voltage decides

the headroom voltage for the LM3464/64A driver stage and

equals to the minimum V

DRx among the drain voltages of the

MOSFETs under steady state. The VDHC pin is internally bi-

ased to 0.9V which also set the default voltage headroom to

0.9V. In applications that the output of the AC/DC converter

contains more than 0.9V peak-to-peak ripple voltage, the volt-

age headroom can be increased by applying external bias to

the VDHC pin.

DEFINING VOLTAGE HEADROOM

The voltage headroom is the rail voltage margin that reserve

for precision linear current regulation under steady state. Un-

der steady state, the voltage headroom is always minimized

by the LM3464/64A to reduce power losses on the MOSFETs

till one of the drain voltage (V

DRx) of the MOSFETs equals the

voltage on VDHC pin (0.9V typical).

With external bias, the voltage of the VDHC pin can be ad-

justed up or down to adapt to different types of primary power

supply. Figure 4 shows a simple resistor based biasing circuit

that derives biasing voltage from the output of the internal

voltage regulator, the VCC pin.

30115013

FIGURE 4. Adjusting Voltage Headroom with Resistors

With the additional resistors, the VDHC pin voltage is ad-

justable in between 0.8V and 2V. The values of R

A and RB

should be at least 10 times lower than the typical values of

the internal resistor divider of the VDHC pin (see Figure 4).

However, it is recommended not to set the voltage headroom

too low because the ripple voltage of the primary power sup-

ply output may cause visible flicker due to insufficient voltage

headroom. Thus the voltage headroom follows this equation:

where 0.8V < V

VDHC < 2V

SETTING LED CURRENT

The LED current regulating mechanism of the LM3464/64A

driver stage contains four individual LED current regulators.

Every LED current regulator is composed of an external MOS-

FET (Q

1-Q4), a current sensing resistor (RISNS1-RISNS4) and

an amplifier inside the LM3464/64A that monitors the feed-

back voltage from the current sensing resistor. The integrated

amplifier compares the voltage across current sensing resis-

tors (R

ISNS1-RISNS4) to a 200mV typical reference voltage and

controls the gate voltage of the MOSFETs (Q

1-Q4) to realize

linear current regulations. Figure 5 shows the simplified circuit

of the linear LED current regulators.

30115029

FIGURE 5. Linear LED Current Regulator

The driving currents of the LED strings are defined by the

values of R

ISNS1 to RISNS4 individually. The LED current and

the value of R

ISNSx are related by the following equation:

Since the accuracy of the LED currents are dependent on the

tolerance of R

ISNSx, the RISNSx to recommended to be thick

carbon file resistors with no more than 1% tolerance and ad-

equate rated power to the desired LED current.

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