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AP431 bảng dữ liệu(PDF) 4 Page - Diodes Incorporated

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Giải thích chi tiết về linh kiện  ADJUSTABLE PRECISION SHUNT REGULATOR
PDF  16 Pages
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AP431 bảng dữ liệu(HTML) 4 Page - Diodes Incorporated

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AP431/AP431A
ADJUSTABLE PRECISION SHUNT REGULATOR
AP431/AP431A
Document number: DS31002 Rev. 15 - 2
4 of 16
www.diodes.com
June 2010
© Diodes Incorporated
Electrical Characteristics (TA = 25
oC, V+ = +5.0V, unless otherwise stated)
Symbol
Parameter
Test Conditions
Min
Typ.
Max
Unit
VREF
Reference voltage
VKA = VREF,
I KA = 10mA (Fig.1)
AP431
AP431A
2.470
2.482
2.495
2.520
2.507
V
VREF
Deviation of Reference input
voltage over temperature
(Note 4)
VKA = VREF, IKA = 10mA,
Ta = Full range (Fig.1)
⎯
8.0
20
mV
ΔV
REF
ΔV
KA
Ratio of the change in
Reference voltage to the
change in Cathode voltage
IKA = 10mA (Fig. 2)
VKA = VREF to10V
⎯
-1.4
-2.0
mV/V
VKA = 10V to 36V
⎯
-1
-2
mV/V
IREF
Reference input current
R1 = 10K
Ω,R2 = ∞ I
KA= 10mA (Fig. 2)
⎯
1.4
3.5
μA
αI
REF
Deviation of Reference input
current over temperature
R1 = 10K
Ω,R2 = ∞ I
KA = 10mA
Ta = Full range (Fig. 2)
⎯
0.4
1.2
μA
IKA(MIN)
Minimum Cathode current
for regulation
VKA = VREF (Fig.1)
⎯
0.19
0.5
mA
IKA(OFF)
Off-state current
VKA = 36V, VREF = 0V (Fig. 3)
⎯
0.1
1.0
μA
|Z
KA|
Dynamic output impedance
(Note 5)
V KA = VREF V KA = VREF
ΔI
KA = 0.1mA ~ 15mA
Frequency
≤ 1KHz (Fig.1)
⎯
0.2
0.5
Ω
VMAX
VMIN
TI
T2
Temperature
VDEV = VMAX - VMIN
Notes: 4. Deviation of reference input voltage, VDEV, is defined as the maximum variation of the reference over the full temperature range.
The average temperature coefficient of the reference input voltage
αV
REF is defined as:
1
2
6
REF
DEV
REF
T
T
10
)
C)
(25
V
V
(
V
−
⋅
°
=
α
……………………..………..…………….. (
)
C
ppm
°
Where:
T2 – T1 = full temperature change.
αV
REF can be positive or negative depending on whether the slope is positive or negative.
Notes:
5. The dynamic output impedance, RZ, is defined as:
KA
KA
KA
I
V
Z
Δ
Δ
=
When the device is programmed with two external resistors R1 and R2 (see Figure 2.), the dynamic output impedance of the overall
circuit, is defined as:
)
R2
R1
(1
Z
i
v
Z
KA
'
KA
+
Δ
Δ
=
≈



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