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FX919AD2 bảng dữ liệu(PDF) 18 Page - CML Microcircuits

tên linh kiện FX919AD2
Giải thích chi tiết về linh kiện  4-Level FSK Modem Data Pump
PDF  44 Pages
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nhà sản xuất  CMLMICRO [CML Microcircuits]
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FX919AD2 bảng dữ liệu(HTML) 18 Page - CML Microcircuits

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4-Level FSK Modem Data Pump
FX919A
© 1996 Consumer Microcircuits Limited
18
D/919A/4
R4S: Read 4 Symbols
This task causes the modem to read the next 4 symbols and translate them directly (without de-interleaving or
FEC) to an 8-bit byte which is placed into the Data Block Buffer. The BFREE and IRQ bits of the Status
Register will then be set to '1' to indicate that the µC may read the data byte from the Data Block Buffer and
write the next task to the Command Register.
This task is intended for special tests and channel monitoring - perhaps preceded by SFS task.
T24S: Transmit 24 Symbols
This task, which is intended to facilitate the transmission of Symbol and Frame Sync patterns as well as special
test sequences, takes 6 bytes of data from the Data Block Buffer and transmits them as 24 4-level symbols
without any CRC or FEC.
Byte 0 of the Data Block Buffer is sent first, byte 5 last.
Once the modem has read the data bytes from the Data Block Buffer, the BFREE and IRQ bits of the Status
Register will be set to '1', indicating to the µC that it may write the data and command byte for the next task to
the modem.
The tables below show what data has to be written to the Data Block Buffer to transmit the FX919A Symbol and
Frame Sync sequences:
'Symbol Sync'
Values written to Data Block Buffer
Symbols
Binary
Hex
+3
+3
-3
-3
Byte 0:
11110101
F5
+3
+3
-3
-3
Byte 1:
11110101
F5
+3
+3
-3
-3
Byte 2:
11110101
F5
+3
+3
-3
-3
Byte 3:
11110101
F5
+3
+3
-3
-3
Byte 4:
11110101
F5
+3
+3
-3
-3
Byte 5:
11110101
F5
'Frame Sync'
Values written to Data Block Buffer
Symbols
Binary
Hex
-1
+1
-1
+1
Byte 0:
00100010
22
-1
+3
-3
+3
Byte 1:
00110111
37
-3
-1
+1
-3
Byte 2:
01001001
49
+3
+3
-1
+1
Byte 3:
11110010
F2
-3
-3
+1
+3
Byte 4:
01011011
5B
-1
-3
+1
+3
Byte 5:
00011011
1B
THB: Transmit Header Block
This task takes 10 bytes of data (Address and Control) from the Data Block Buffer, calculates and appends the
2-byte CRC1 checksum, translates the result to 4-level symbols (with FEC), interleaves the symbols and
transmits the result as a formatted 'Header' Block.
Once the modem has read the data bytes from the Data Block Buffer, the BFREE and IRQ bits of the Status
Register will be set to '1'.



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