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FX589P bảng dữ liệu(PDF) 4 Page - CML Microcircuits

tên linh kiện FX589P
Giải thích chi tiết về linh kiện  Low-Voltage/High-Speed GMSK Modem
PDF  18 Pages
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nhà sản xuất  CMLMICRO [CML Microcircuits]
Trang chủ  http://www.cmlmicro.com
Logo CMLMICRO - CML Microcircuits

FX589P bảng dữ liệu(HTML) 4 Page - CML Microcircuits

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4
Application Information
XTAL
XTAL/CLOCK
ClkDivA
ClkDivB
RxDCacq
PLLacq
Doc1
Doc2
BT
Tx OUT
Tx ENABLE
Tx PS
Tx DATA
Rx DATA
Rx CLOCK
Tx CLOCK
Rx S/N
V
DD
V
DD
R 3
R 1
R 4
C 6
C 5
C 8
C 7
C 1
C 4
V
SS
V
BIAS
V SS
V SS
Rx PS
Rx FEEDBACK
Rx SIGNAL IN
Rx HOLD
XTAL
XTAL/CLOCK
1
2
V
SS
C 3
C 2
X 1
R 2
1
2
3
4
5
6
7
8
9
10
11
12
FX589P
24
23
22
21
20
19
18
17
16
15
14
13
External Components
Component
Value
Tolerance
R
1
Note 1
±5%
R
2
1.0M
Ω
±10%
R
3
Note 2
±10%
R
4
100k
Ω
±10%
C
1
Note 1
±10%
C
2
Note 5
C
3
Note 5
C
4
100nF
±20%
C
5
1.0µF
±20%
C
6
22.0pF
±20%
C
7
Note 4
C
8
Note 4
X
1
Note 3
Fig.2 Recommended External Components
2. R
3, R4 and C6 form the gain components for the Rx
Input signal. R
3 should be chosen as required by the
signal input level.
3. The FX589 can operate correctly with Xtal/Clock
frequencies of 1.0MHz to 8.2MHz (V
DD = 5.0V) and
1.0MHz to 5.0MHz (V
DD = 3.0V); see Table 1 for
examples. Operation of this device without a Xtal or
Clock input may cause device damage.
4. C
7 and C8 should both be 15.0nF for a data rate of
8kb/s, and inversely proportional to the data rate for
other data rates, e.g. 30.0nF at 4kb/s, 1.8nF at
64kb/s.
5. The value chosen for C
2 and C3 (including stray
capacitances) should be suitable for the applied V
DD
and the frequency of X
1.
As a guide: C
2 = C3 = 33.0pF at 1.0MHz falling to
18pF at the maximum frequency.
At 3 volts, C
2 = C3 = 33.0pF falling to 18pF at 5.0MHz.
The equivalent series resistance of X
1 should be less
than 2.0k
Ω falling to 150Ω at the maximum frequency.
Stray capacitance on the Xtal/clock circuit pins must
be minimised.
Notes
1. The RC network formed by R
1 and C1 is required
between the Tx Out pin and the input to the
modulator. This network, which can form part of any
dc level shifting and gain adjustment circuitry, forms
an important part of the transmit signal filtering.
The ground connection to the capacitor C
1 should be
positioned to give maximum attenuation of high-
frequency noise into the modulator.
The component values should be chosen so that the
product of the resistance (Ohms) and the capacitance
(Farads) is: BT of 0.3 = 0.34/bit rate (bits/second)
BT of 0.5 = 0.22/bit rate (bits/second).
Data Rate
BT = 0.3
BT = 0.5
(b/s)
R1 (k
Ω) C1 (pF)
R1 (k
Ω) C1 (pF)
4000
120
680
120
470
4800
100
680
100
470
8000
91
470
120
220
9600
91
390
47
470
16000
47
470
91
150
19200
100
180
91
120
32000
47
220
47
150
38400*
47
180
47
120
64000*
56
100
51
68
* V
DD
>= 4.5V
Note that in all cases, the value of R
1 should be not less
than 47.0k
Ω and that the calculated value of C
1 includes
calculated parasitic (circuit) capacitances.



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