MX802J datasheet(5/24 Pages) CMLMICRO

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DVSR CODEC

MX802

1998 MX-COM, Inc.

www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054

Doc. # 20480033.008

4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA

All trademarks and service marks are held by their respective companies.

J/LH8

Signal

Description

Decoder In (DEI)

DRAM Data Out/A1/Direct Access --: This is connected to the DRAM

data output and address line A1. With no DRAM used, this pin is

available in a Direct Access mode as the Delta Decoder Clock input.

Direct Access control is achieved by Control Register byte 1, bit 6.

Decoder Clock

(DCK):

DRAM A2/Direct Access -- This is the DRAM address line A2. With no

DRAM employed, this pin is available in a Direct Access mode as the

Delta Decoder Clock Input. Direct Access control is achieved by Control

Encoder Clock

(ECK)

DRAM A3/Direct Access: This is the DRAM address line A3. With no

DRAM employed, this pin is available in a Direct Access mode as the

Delta Encoder Clock Output. Direct Access control is achieved by

Control Register byte1, bit 6.

DRAM A4

DRAM address line 4.

DRAM A5

DRAM address line 5.

DRAM A6

DRAM address line 6.

DRAM A7

DRAM address line 7.

DRAM A8

DRAM address line 8.

RAS4

Strobe

Row Addres

: This pin should be connected to the Row

Address Strobe input of the fourth 1Mbit DRAM chip (if used).

RAS

Strobe

Row Addres

: This pin should be connected to the Row

Address Strobe input of the third 1Mbit DRAM chip (if used).

DRAM A9

This is DRAM address line A9. This pin is not connected when a

256kbit DRAM is used. Note: To simplify PCB layout, the DRAM

address inputs A0-A8 may be connected in any physical order to the

DVSR Codec output pins A0-A8.

CAS

Strobe

Address

Column

: This is the DRAM Column Address Strobe

pin. It should be connected to the CAS pins of all DRAM chips.

VDD

Positive supply. A single, stable +5 volt supply is required. Levels and

voltages within the DVSR Codec are dependent upon this supply.

Table 1: Signal List

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