UBA2071ATS datasheet(7/35 Pages) NXP

7 / 35 page

UBA2071_A_1

Product data sheet

Rev. 01 — 23 June 2008

7 of 35

NXP Semiconductors

UBA2071; UBA2071A

Half bridge control IC for CCFL backlighting

8.1 Supply, Start-up and UnderVoltage LockOut (UVLO)

The UBA2071 is supplied via the VDD pin as shown in Figure 4. The supply voltage is

either made by the inverter itself, using a

∆V/∆t or is a auxiliary ﬁxed supply voltage. A

start-up current source that can supply minimal Istartup(VDD) is needed for start-up. This can

be a resistor to the half bridge supply voltage.

The IC starts up when the voltage at the VDD pin goes over Vstartup(VDD) and shuts down

when the voltage at the VDD pin drops below Vstop(VDD) and the output GL is high1. The

hysteresis between the start and stop levels allows the IC to be supplied by the supply

buffer capacitor (C1 in Figure 4) until the auxiliary supply is settled. The auxiliary supply

must not exceed the maximum voltage allowed on the VDD pin and has to be above

Vstop(VDD).

The UBA2071A can directly be supplied by a ﬁxed voltage source on the VDD pin. The

voltage supplied by this source has to be above the maximum value of Vstartup(VDD) but

below the maximum of VVDD. Typically it will be a 12 V ± 5 % source.

Fig 3.

Basic half bridge inverter

LOAD

VHV

0.5 VHV

VHB

VDD

PGND

UBA2071

014aaa100

CFS

QHS

QLS

Cblock

Fig 4.

Supply conﬁguration (for UBA2071 only)

When both GH and GL are low, during the lamps-off period of PWM dimming (PWMD is high), the IC will shut down until the

PWMD is low and the GL is high again.

UBA2071

VDD

start

current

AUXILARY

SUPPLY

014aaa101

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