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TLE7259G bảng dữ liệu(PDF) 22 Page - Infineon Technologies AG |
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TLE7259G bảng dữ liệu(HTML) 22 Page - Infineon Technologies AG |
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22 / 27 page ![]() Data Sheet 22 Rev 2.1, 2007-04-27 TLE7259G Application Information 7 Application Information 7.1 ESD Robustness according to IEC61000-4-2 Test for ESD robustness according to IEC61000-4-2 “Gun test” (150 pF, 330 Ω) have been performed. The results and test conditions are available in a seperate test report. 7.2 Master Termination To achieve the required timings for the dominant to recessive transition of the bus signal an additional external termination resistor of 1 k Ω is mandatory. It is recommended to place this resistor at the master node. To avoid reverse currents from the bus line into the battery supply line it is recommended to place a diode in series with the external pull-up. For small systems (low bus capacitance) the EMC performance of the system is supported by an additional capacitor of at least 1 nF in the master node (see Figure 11 and Figure 12, application circuit). 7.3 External Capacitors A capacitor of 22 µF at the supply voltage input V S buffers the input voltage. In combination with the required reverse polarity diode this prevents the device from detecting power down conditions in case of negative transients on the supply line. The 100 nF capacitors close to the V S pins of the TLE7259G and the voltage regulator help to improve the EMC behavior of the system. Table 8 ESD “Gun test” Performed Test Result Unit Remarks Electrostatic discharge voltage at pin V S, Bus, Wk versus GND ≥ +8 kV 1)Positive pulse 1) ESD susceptibility “ESD GUN” according LIN EMC 1.3 Test Specification, Section 4.3. (IEC 61000-4-2) -Tested by external testhouse (IBEE Zwickau, EMC Testreport Nr. 16-05-06). Electrostatic discharge voltage at pin V S, Bus, Wk versus GND ≤ -8 kV 1)Negative pulse |
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