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TLE7230R bảng dữ liệu(PDF) 8 Page - Infineon Technologies AG

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Data Sheet TLE 7230 R
V2.0
Page
2005-10-05
8
CS – Chip Select of the Serial Peripheral Interface
SO – Signal Output of the Serial Peripheral Interface
SI – Signal Input of the Serial Peripheral Interface. The pin has an internal pull down structure.
SCLK – Clock Input of the Serial Peripheral Interface. The pin has an internal pull down structure
SPI
The SPI is a Serial Peripheral Interface with 4 digital pins
and a 16 bit shift register. The SPI is used to configure and
program the device, turn on and off channels and to read
detailed diagnostic information.
SPI Signal Description:
CS - Chip Select. The system microcontroller selects the TLE 7230 R by means of the CS pin. When-
ever the pin is in a logic low state, data can be exchanged between the µC and TLE 7230 R.
CS = H: Any signals at the SCLK and SI
pins are ignored and SO is forced into a
high impedance state.
CS = H
àL:
• diagnostic information is transferred
from the diagnosis register into the SPI
shift register. (in sleep mode no trans-
fer of diagnostic information)
• serial input data can be clocked into
the SPI shift register from then on
• SO changes from high impedance
state to logic high or low state corre-
sponding to the SO bits
CS = L: SPI functions as a shift register. With each clock signal at the SCLK pin the state of the SI is
read into the SPI shift-register (falling clock edge) and one diagnosis bit is written out of SO (rising
edge).
CS = L
àH:
• transfer of SI bits from SPI shift register into the internal logic registers sent command is valid
• reset of diagnosis register if sent command is valid
To avoid any false clocking the serial clock input pin SCLK should be logic low state during high to low
transition of CS. The SPI of the TLE 7230 R has an integrated modulo 8 counter. If the number of clock
signals is not an integer multiple of 8 the SPI will not accept the data in the shift register and the fault
register will not be reset.
SCLK - Serial Clock. The serial clock pin clocks the internal SPI shift register of the TLE 7230 R. The
serial input (SI) accepts data into the input SPI shift register on the falling edge while the serial output
(SO) shifts diagnostic information out of the SPI shift register on the rising edge of serial clock. It is es-
sential that the SCLK pin is in a logic low state whenever chip select (CS) makes any transition.
internal logic registers
diagnosis register
16 bit SPI shift register
SI
SO
CS
CS
MSB
MSB
LSB
LSB
Serial input
data MSB first
Serial output
(diagnosis)
data
MSB first
SPI
CS
SCLK
SI
SO



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