IR3522MPBF datasheet(3/32 Pages) IRF

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IR3522

Page 3

V3.01

PIN#

PIN SYMBOL

PIN DESCRIPTION

IIN1

Output 1 average current input from the output 1 phase IC(s). This pin is also used

to initialize Diode Emulation Mode in the phase IC(s).

CROWBAR

Drives NMOS crowbar devices at VTT and VDDR rails.

ROSC

Connect a resistor to LGND to program oscillator frequency and OCSET1, OCSET2,

and VREF bias currents. Oscillator frequency equals switching frequency per phase.

The pin voltage is 0.6V during normal operation.

LGND

Local Ground for internal circuitry and IC substrate connection.

CLKOUT

Clock output at switching frequency multiplied by phase number. Connect to CLKIN

pins of phase ICs.

PHSOUT

Phase clock output at switching frequency per phase. Connect to PHSIN pin of the

first phase IC.

PHSIN

Feedback input of phase clock. Connect to PHSOUT pin of the last phase IC.

VCCL

Output of the voltage regulator, and power input for clock oscillator circuitry. Connect

a decoupling capacitor to LGND.

VID0

Digital input to program one of four power-up VREF1 VDD reference values.

Connect to LGND for logic “0”, float for logic “1”

VID1

Digital input to program one of four power-up VREF1 VDD reference values.

Connect to LGND for logic “0”, float for logic “1”

PGOOD

Open collector output that drives low during startup and under any external fault

condition. The Power Good function also monitors output voltages and this pin will

drive low if any of the voltage planes are outside of the specified limits. Connect

external pull-up.

SCL

SCL (Serial Clock) is an open drain output of the I

2C controller and input to IR3522.

This pin requires an external bias voltage and should not be floated.

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