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L9953TR bảng dữ liệu(PDF) 14 Page - STMicroelectronics

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Electrical specifications
L9953 / L9953XP
14/38
Doc ID 14278 Rev 3
2.5
SPI - electrical characteristics
(VS = 8 to 16V, VCC = 4.5 to 5.3V, Tj = - 40 to 150°C, unless otherwise specified. The
voltages are referred to GND and currents are assumed positive, when the current flows into
the pin).
Table 12.
Delay time from standby to active mode
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
tset
Delay time
Switching from standby to active mode.
Time until output drivers are enabled
160
300
µs
Table 13.
Inputs: CSN, CLK, PWM1/2 and DI
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
VinL
Input low level
VCC = 5V
1.5
2.0
V
VinH
Input high level
VCC = 5V
3.0
3.5
V
VinHyst
Input hysteresis
VCC = 5V
0.5
V
ICSN in
Pull up current at input CSN
VCSN = 3.5V VCC = 5V
-40
-20
-5
µA
ICLK in
Pull down current at input CLK
VCLK = 1.5V
10
25
50
µA
IDI in
Pull down current at input DI
VDI = 1.5V
10
25
50
µA
IPWM1 in
Pull down current at input
PWM1
VPWM = 1.5V
10
25
50
µA
Cin
(1)
1.
Value of input capacity is not measured in production test. Parameter guaranteed by design.
Input capacitance at input
CSN, CLK, DI and PWM1/2
0 V < VCC < 5.3V
10
15
pF
Table 14.
DI timing(1)
1.
DI timing parameters tested in production by a passed / failed test:
Tj= -40°C / +25°C:
SPI communication @ 2MHz.
Tj= +125°C
SPI communication @ 1.25 MHz.
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
tCLK
Clock period
VCC = 5V
1000
ns
tCLKH
Clock high time
VCC = 5V
400
ns
tCLKL
Clock low time
VCC = 5V
400
ns
tset CSN
CSN setup time, CSN low
before rising edge of CLK
VCC = 5V
400
ns
tset CLK
CLK setup time, CLK high
before rising edge of CSN
VCC = 5V
400
ns
tset DI
DI setup time
VCC = 5V
200
ns
thold time DI hold time
VCC = 5V
200
ns
tr in
Rise time of input signal DI,
CLK, CSN
VCC = 5V
100
ns
tf in
Fall time of input signal DI,
CLK, CSN
VCC = 5V
100
ns



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