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STM32F103CBT7XXX bảng dữ liệu(PDF) 74 Page - STMicroelectronics

tên linh kiện STM32F103CBT7XXX
Giải thích chi tiết về linh kiện  Medium-density performance line ARM-based 32-bit MCU with 64 or 128 KB Flash, USB, CAN, 7 timers, 2 ADCs, 9 communication interfaces
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
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STM32F103CBT7XXX bảng dữ liệu(HTML) 74 Page - STMicroelectronics

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Electrical characteristics
STM32F103x8, STM32F103xB
74/96
Doc ID 13587 Rev 12
Figure 37.
Typical connection diagram using the ADC
1.
Refer to Table 45 for the values of RAIN, RADC and CADC.
2.
Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the
pad capacitance (roughly 7 pF). A high Cparasitic value will downgrade conversion accuracy. To remedy
this, fADC should be reduced.
General PCB design guidelines
Power supply decoupling should be performed as shown in Figure 38 or Figure 39,
depending on whether VREF+ is connected to VDDA or not. The 10 nF capacitors should be
ceramic (good quality). They should be placed them as close as possible to the chip.
Figure 38.
Power supply and reference decoupling (VREF+ not connected to VDDA)
1.
VREF+ and VREF– inputs are available only on 100-pin packages.
ai14150c
STM32F103xx
VDD
AINx
IL±1 µA
0.6 V
VT
RAIN(1)
Cparasitic
VAIN
0.6 V
VT
RADC(1)
12-bit
converter
CADC(1)
Sample and hold ADC
converter
VREF+
(see note 1)
STM32F103xx
VDDA
VSSA /VREF–
(see note 1)
1 µF // 10 nF
1 µF // 10 nF
ai14388b



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