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STE12PS bảng dữ liệu(PDF) 13 Page - STMicroelectronics |
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STE12PS bảng dữ liệu(HTML) 13 Page - STMicroelectronics |
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13 / 44 page ![]() Obsolete Product(s) - Obsolete Product(s) STE12PS Functional description 13/44 ● CLASSIFICATION: The following operations are related to the classification procedure for the corresponding channel – If classification is not enabled, the default Class 0 is assigned. – High Voltage detection command (17V) is issued via registers; detection timer is started to execute the command for 15ms duration. – Wait for 5ms to acquire a stable measurement – Sampled sensing current values are acquired via A/D converter. – Average the previously acquired samples and report the resulting value in a dedicated register. The power class is identified and the result is reported in the Channel Status registers. – Channel is ready to be powered: if the smart-power algorithm is enabled (via the MISCELLANEOUS registers) the channel is powered only if the required power is within the remaining power budget; the channel can be powered regardless of the power-check availability via registers. If the power availability check has a positive result (or it hasn’t been performed), the channel is powered. Otherwise, it is rejected, and the alarm flag raised in the Channel Events register. The channel number is registered into a scheduler FIFO so that power will again be available when the channel is ready to be switched-on. Figure 4. Detection and classification equivalent architecture Detection/classification +48V + - + + - 12-bit A/D converter Digital controller + - D1 x12 D2 x12 STE12PS VL SPx Px +4V +8V +17V - IDET_HVLV 180pF Detection/classification + - + + - 12-bit A/D converter Digital controller + - D1 x12 D2 x12 VL SPx Px +4V 8V +17V - IDET_HVLV 180pF |
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